CMOS image sensor and method of fabricating the same
View Patent ↗A CMOS image sensor and method for fabricating the same, wherein the CMOS image sensor has minimized dark current at the boundary area between a photodiode and an isolation layer. The present invention includes a first-conductivity-type doping area formed in the device isolation area of the substrate, the first-conductivity-type doping area surrounding the isolation area and a dielectric layer formed between the isolation layer and the first-conductivity-type doping area, wherein the first-conductivity-type doping area and the dielectric layer are located between the isolation layer and a second-conductivity-type diffusion area.
1. A CMOS image sensor, comprising:
a first-conductivity-type semiconductor substrate defined by an active area and a device isolation area;
an isolation layer formed in the device isolation area of the substrate;
a second-conductivity-type diffusion area formed in the active area of the substrate;
a first-conductivity-type doping area formed in the device isolation area of the substrate, the first-conductivity-type doping area surrounding the isolation layer; and
a dielectric layer formed between the isolation layer and the first-conductivity-type doping area,
wherein the first-conductivity-type doping area and the dielectric layer are located between the isolation layer and the second-conductivity-type diffusion area.
2. The CMOS image sensor of claim 1 , wherein the dielectric layer is a thermal oxide layer.
3. The CMOS image sensor of claim 1 , wherein the dielectric layer has a thickness of 50˜500 Å.
4. The CMOS image sensor of claim 1 , wherein the first-conductivity-type doping area is formed by injecting B or BF 2 into the device isolation area.
5. The CMOS image sensor of claim 1 , wherein the first-conductivity-type substrate comprises:
a high density first-conductivity-type silicon; and
a low density first-conductivity-type epitaxial layer formed on the high density first-conductivity-type silicon.
6. The CMOS image sensor of claim 1 , wherein the active area is defined by a photodiode area and a transistor area, the second-conductivity-type diffusion area formed in area corresponding to the photodiode area.
7. The CMOS image sensor of claim 5 , further comprising a gate oxide layer and a gate formed sequentially on the low density first-conductivity-type epitaxial layer.
8. The CMOS image sensor of claim 7 , further comprising dielectric spacers formed on sidewalls of the gate.
9. The CMOS image sensor of claim 7 , further comprising source/drain region formed in surface of the density first-conductivity-type epitaxial layer beside the gate.
10. The CMOS image sensor of claim 9 , wherein the source/drain region comprising a high-density first-conductivity-type diffusion area, and a low-density first-conductivity-type diffusion area.