Image capturing apparatus and electronic information device

1. A solid-state image capturing apparatus comprising a pixel array in which a plurality of pixels are arranged in a matrix, wherein each of the pixels includes:

a photodiode for obtaining a signal charge by a photo-electric conversion of an incident light, a selection transistor for selecting a pixel that the selection transistor configures from the plurality of pixels that configure the pixel array, an amplifying transistor for amplifying the signal charge obtained at the photodiode, a transfer transistor for transferring the signal charge obtained at the photodiode to a gate electrode of the amplifying transistor, and a reset transistor for discharging the signal charge obtained at the photodiode,

wherein the amplifying transistor is configured in such a manner that a gate area of the amplifying transistor is defined to be larger than a gate area of the other transistors that configure the pixel with the exception of the transfer transistor;

the selection transistor is located in the same active area as that of the amplifying transistor, and a gate area of the selection transistor is defined to be equal to a gate area of the reset transistor or to be smaller than the gate area of the reset transistor; and

the pixel array is configured in such a manner that a plurality of two adjacent pixels share the reset transistor, and the gate area of the reset transistor is defined to be an area of a region in which a gate electrode and a channel area of the gate electrode in the reset transistor are overlapped.

2. A solid-state image capturing apparatus according to claim 1 , wherein the pixel array is configured in such a manner that the plurality of two adjacent pixels share the selection transistor, and that a certain pixel in the plurality of two adjacent pixels is selected by the selection transistor and the transfer transistor of each pixel.

3. A solid-state image capturing apparatus according to claim 1 , wherein the pixel is a pixel of a 4 transistor configuration that includes the amplifying transistor, the transfer transistor, the reset transistor and the selection transistor.

4. A solid-state image capturing apparatus according to claim 3 , wherein the pixel array is configured in such a manner that the plurality of two adjacent pixels share the reset transistor and the selection transistor.

5. A solid-state image capturing apparatus according to claim 1 , wherein the amplifying transistor is a source follower transistor that operates as a source follower circuit.

6. A solid-state image capturing apparatus according to claim 5 , wherein a gate area of the source follower transistor is 135% or more of a gate area of the other transistors that configure the pixel with the exception of the transfer transistor.

7. A solid-state image capturing apparatus according to claim 5 , wherein a channel length of the source follower transistor is 135% or more of a maximum channel length of the other transistors that configure the pixel with the exception of the transfer transistor.

8. A solid-state image capturing apparatus according to claim 5 , wherein the source follower transistor is a second conductive type MOS field-effect transistor that includes a gate electrode that is configured of a first conductive type semiconductor.

9. A solid-state image capturing apparatus according to claim 5 , wherein the source follower transistor is a first conductive type MOS field-effect transistor that includes a gate electrode that is configured of a first conductive type semiconductor.

10. An electronic information device comprising an image capturing section for capturing an image of a subject, wherein the image capturing section is the solid-state image capturing apparatus according to any one of claims 1 to 9 .