Liquid crystal display device with high aperture ratio
Disclosed is an in-plane switching (IPS) mode liquid crystal display (LCD) device having an increased aperture ratio by overlapping a storage capacitor on a lower end of an electrode. The (IPS) mode liquid crystal display device (LCD) device includes first and second substrates; a gate line and a data line arranged horizontally and vertically to define a plurality of pixel regions on the first substrate; a switching device, having a gate electrode, a semiconductor layer and source and drain electrodes, at a crossing of the gate line and the data line; a passivation film on an entire surface of the first substrate including the switching device; a common electrode and a pixel electrode alternately disposed at an upper portion of the passivation film and generating an in-plane electric field, wherein at least one of the common and pixel electrodes has a first storage capacitor at its lower end; and a liquid crystal layer between the first and second substrates.
1. An in-plane switching (IPS) mode liquid crystal display (LCD) device, comprising:
first and second substrates;
a gate line and a data line arranged horizontally and vertically to define a plurality of pixel regions on the first substrate;
a switching device, having a gate electrode, a semiconductor layer and source and drain electrodes, at a crossing of the gate line and the data line;
at least one metal layer on a same layer of the gate line;
a first storage electrode overlapping the metal layer to form a first storage capacitor;
a passivation film on an entire surface of the first substrate including the switching device and the first storage electrode;
a common electrode and a pixel electrode arranged an alternating pattern at an upper portion of the passivation film in the pixel region and generating an in-plane electric field, wherein at least one of the common and pixel electrodes has the first storage capacitor at its lower portion; and
a liquid crystal layer between the first and second substrates.
2. The device of claim 1 , wherein the first storage electrode is form on the same layer of the data line.
3. The device of claim 1 , wherein the first storage electrode is extended from the drain electrode.
4. The device of claim 1 , further comprising the common line connected to the common electrodes to supply the common voltage to the common electrode, the metal layer being extended from the common line.
5. The device of claim 1 , wherein the first storage capacitor is disposed at the lower portion of the common electrode.
6. The device of claim 5 , wherein the metal layer and the first storage electrode has the width narrower than that of the common electrode.
7. The device of claim 1 , wherein the common electrode and the pixel electrode are made of transparent conductive material.
8. The device of claim 1 , further comprising a second storage electrode above the common line to from a second storage capacitor.
9. The device of claim 8 , wherein the second storage electrode is extended from the drain electrode.
10. The device of claim 1 , further comprising a third storage electrode overlapped with the gate line at the neighboring pixel to from a third storage capacitor.
11. The device of claim 10 , wherein the third storage electrode is extended from the first storage electrode.
12. The device of claim 1 , wherein the common electrode and the pixel electrode are bent at least once in the pixel.
13. The device of claim 1 , wherein the data line is bent at least once in the pixel.
14. The device of claim 1 , wherein the common electrode and the pixel electrode are substantially parallel to the data line.