IP Library Granted Patent US 7,843,229
Granted Patent B2
US 7,843,229 · App. 12/382,833 · Granted Nov 30, 2010

Signal output circuit

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Quick Facts
Patent No.
US 7,843,229
App. No.
12/382,833
Granted
Nov 30, 2010
Kind
B2
Abstract

Disclosed is a signal output circuit comprising: a first transistor of an emitter follower configuration, which receives an input signal; a second transistor of an emitter follower configuration, which receives the input signal, and has an output connected to an external load ( 106 ); a comparator circuit which has an input pair connected via resistors to emitters of the first and the second transistors; a first current mirror circuit which has an input connected to an output of a first current source transistor and an output connected to an emitter of the first transistor; and a second current mirror circuit which has an input connected to a connection node of an output of a second current source transistor and an output of the comparator circuit, and has an output connected to an emitter of the second transistor.

Claims (28)

1. A signal output circuit comprising:

a first transistor of an emitter follower configuration, the first transistor receiving an input signal;

a second transistor of an emitter follower configuration, the second transistor receiving the input signal and having an emitter connected to an external load;

a comparator circuit having an input pair for receiving emitter outputs of the first and the second transistors and comparing the received emitter outputs of the first and the second transistors;

first and second current sources;

a first current mirror circuit having an input connected to an output of the first current source, and having an output connected to the emitter of the first transistor; and

a second current mirror circuit having an input connected to a connection node of an output of the second current source and an output of the comparator circuit, and having an output connected to the emitter of the second transistor.

2. The signal output circuit according to claim 1 , wherein the emitters of the first and second transistors are connected to the input pair of the comparator circuit via first and second resistors, respectively.

3. The signal output circuit according to claim 1 , wherein the first and second current sources are biased by a common bias voltage.

4. The signal output circuit according to claim 2 , wherein the comparator circuit comprises:

differential pair transistors having bases connected to one ends of the first and second resistors, respectively, and having emitters coupled together, the bases of the differential pair transistors constituting the input pair of the comparator circuit;

a third current source having an output connected to the coupled emitters of the differential pair transistors; and

a load circuit connected to a pair of collectors of the differential pair transistors;

the third current source along with the first and the second current sources being biased by a common bias voltage from a bias supply circuit.

5. The signal output circuit according to claim 4 , wherein

the first and the second transistors of an emitter follower configuration, and each transistor constituting the first and the second current mirror circuits and the load circuit of the comparator circuit are PNP bipolar transistors, and

each transistor constituting the first to the third current source, and each of the differential pair transistors of the comparator circuit are NPN bipolar transistors.

6. The signal output circuit according to claim 4 , wherein

the first and the second transistors of an emitter follower configuration, and each transistor constituting the first and the second current mirror circuits and the load circuit of the comparator circuit are NPN bipolar transistors, and

each transistor constituting the first to the third current source, and each of the differential pair transistors of the comparator circuit are PNP bipolar transistors.

7. An optical receiver circuit comprising:

an optical detector which detects light and outputs a current;

a current-to-voltage conversion circuit which converts an output current of the optical detector to a voltage; and

a signal output circuit which receives an output of the current-to-voltage conversion circuit, the signal output circuit including the signal output circuit as set forth in claim 1 .

8. The optical receiver circuit according to claim 7 , wherein

the current-to-voltage conversion circuit comprises a differential amplifier having an inverting input terminal connected to a cathode of a photodiode included by the optical detector, and having a non-inverting input terminal supplied with a prescribed reference voltage;

the signal output circuit receives an output signal of the differential amplifier as the input signal; and

the emitter output of the first transistor of the signal output circuit is connected to the inverting input terminal of the differential amplifier via a feedback resistor.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0183 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2009
From: KIMURA, KENJI; SATO, MASANORI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022489/0306 →