IP Library Granted Patent US 7,892,886
Granted Patent B2
US 7,892,886 · App. 12/385,880 · Granted Feb 22, 2011

Semiconductor chip and semiconductor device, and method of manufacturing the same

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Quick Facts
Patent No.
US 7,892,886
App. No.
12/385,880
Granted
Feb 22, 2011
Kind
B2
Abstract

At least a part of an outer edge of a surface where a circuit forming region, for example, of a semiconductor substrate that forms a semiconductor chip is arranged (a region surrounded by a scribe line around the circuit forming region) is cut or polished, so as to form a smooth slope is chamfered non-parallel and non-vertical to the circuit forming region. Then, a code indicating management information is assigned to the slope. Further, a plurality of semiconductor chips are stacked to manufacture a semiconductor device.

Claims (15)

1. A semiconductor chip comprising:

first and second principal surfaces that are opposed to each other; and

a slope that is non-parallel and non-vertical to the first principal surface, the slope being formed by chamfering at least a part of an outer edge of the first principal surface,

wherein a semiconductor circuit is formed on at least one of the first and second principal surfaces, and information is displayed on the slope.

2. A semiconductor device comprising:

a semiconductor chip including first and second principal surfaces that are opposed to each other, and a slope that is non-parallel and non-vertical to the first principal surface, the slope being formed by chamfering at least a part of an outer edge of the first principal surface; and

another semiconductor chip that is stacked on the first principal surface of the semiconductor chip,

wherein a semiconductor circuit is formed on at least one of the first and second principal surfaces, and information is displayed on the slope.

3. A method of manufacturing a semiconductor chip including first and second principal surfaces that are opposed to each other and a semiconductor circuit that is formed in at least one of the first and second principal surfaces, the method comprising:

chamfering at least a part of an outer edge of the first principal surface in a way that the part is non-parallel and non-vertical to the first principal surface; and

assigning information to the slope that is formed by the chamfering.

4. The method of manufacturing the semiconductor chip according to claim 3 , wherein at least the part of the outer edge is cut or polished to form the slope to be smooth in the chamfering.

5. A method of manufacturing a semiconductor device, comprising:

chamfering at least a part of an outer edge of a first principal surface of a semiconductor chip including first and second principal surfaces that are opposed to each other and a semiconductor circuit that is formed on at least one of the first and second principal surfaces in a way that the part is non-parallel and non-vertical to the first principal surface, and assigning information to a slope that is formed by the chamfering; and

stacking another semiconductor chip on the first principal surface of the semiconductor chip.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0183 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2009
From: UETA, KOJI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022639/0505 →