IP Library Granted Patent US 8,099,544
Granted Patent B2
US 8,099,544 · App. 12/390,265 · Granted Jan 17, 2012

Information processing apparatus and nonvolatile semiconductor memory drive

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,099,544
App. No.
12/390,265
Granted
Jan 17, 2012
Kind
B2
Abstract

According to one embodiment, a control module of a nonvolatile semiconductor memory drive has a first erase mode in which an address management table, which is indicative of a correspondency between logical block addresses and physical addresses of a nonvolatile semiconductor memory, is initialized to set the memory area of the nonvolatile semiconductor memory in a state in which no user data is written, a second erase mode in which the address management table is initialized to set the memory area in a state in which no user data is written, and the blocks, other than a defective block, which are included in the memory area, are erased, and a third erase mode in which the address management table is initialized to set the memory area in a state in which no user data is written, and the blocks, including the defective block, which are included in the memory area, are erased.

Claims (14)

1. An information processing apparatus comprising:

an information processing apparatus main body; and

a nonvolatile semiconductor memory drive which is accommodated in the information processing apparatus main body, the nonvolatile semiconductor memory drive including a nonvolatile semiconductor memory having a memory area including a plurality of blocks, and a control module, the control module having a first erase mode in which an address management table, which is indicative of a correspondency between logical block addresses and physical addresses of the nonvolatile semiconductor memory, is initialized to indicate that the memory area has no user data, a second erase mode in which the address management table is initialized to indicate that the memory area has no user data, and the blocks, other than a defective block, which are included in the memory area, are erased, and a third erase mode in which the address management table is initialized to indicate that the memory area has no user data, and the blocks, including the defective block, which are included in the memory area, are erased, and the control module selectively using the first erase mode, the second erase mode and third erase mode, thereby executing an erase operation on the memory area, wherein the control module selects the first erase mode when a command for designating the first erase mode is received from the information processing apparatus main body, selects the second erase mode when a command for designating the second erase mode is received from the information processing apparatus main body, and selects the third erase mode when a command for designating the third erase mode is received from the information processing apparatus main body.

2. The information processing apparatus of claim 1 , wherein the defective block is a block in which an error occurs at a time of data write or data read.

3. The information processing apparatus of claim 1 , wherein a process of initializing the address management table includes a process of setting the address management table in a state in which the physical address corresponding to each of the logical block addresses is not written in the address management table.

4. A nonvolatile semiconductor memory drive which is used as an external storage device of an information processing apparatus, comprising:

a nonvolatile semiconductor memory having a memory area including a plurality of blocks; and

a control module having a first erase mode in which an address management table, which is indicative of a correspondency between logical block addresses and physical addresses of the nonvolatile semiconductor memory, is initialized to indicate that the memory area has no user data, a second erase mode in which the address management table is initialized to indicate that the memory area has no user data, and the blocks, other than a defective block, which are included in the memory area, are erased, and a third erase mode in which the address management table is initialized to indicate that the memory area has no user data, and the blocks, including the defective block, which are included in the memory area, are erased, the control module selectively using the first erase mode, the second erase mode and third erase mode, thereby executing an erase operation on the memory area, wherein the control module selects the first erase mode when a command for designating the first erase mode is received from the information processing apparatus, selects the second erase mode when a command for designating the second erase mode is received from the information processing apparatus, and selects the third erase mode when a command for designating the third erase mode is received from the information processing apparatus.

5. The nonvolatile semiconductor memory drive of claim 4 , wherein the defective block is a block in which an error occurs at a time of data write or data read.

6. The nonvolatile semiconductor memory drive of claim 4 , wherein a process of initializing the address management table includes a process of setting the address management table in a state in which the physical address corresponding to each of the logical block addresses is not written in the address management table.

7. A nonvolatile semiconductor memory drive which is used as an external storage device of an information processing apparatus, comprising:

a nonvolatile semiconductor memory that comprises a memory area including a plurality of blocks, the nonvolatile semiconductor memory storing an address management table; and

a control unit that controls data write and data read on the plurality of blocks within the memory area of the nonvolatile semiconductor memory, the control unit is adapted to select one erase mode from a plurality of erase modes upon receipt of a command corresponding to the one of the plurality of erase modes, the plurality of erase modes comprise (i) a first erase mode in which the address management table, including logical block addresses and their corresponding physical addresses of the nonvolatile semiconductor memory, is initialized to indicate that the memory area has no user data, (ii) a second erase mode in which the address management table is initialized to indicate that the memory area has no user data and the plurality of blocks, other than a defective block in the memory area, are erased, and (iii) a third erase mode in which the address management table is initialized to indicate that the memory area has no user data and the plurality of blocks in the memory area, including the defective block, are erased.

8. The nonvolatile semiconductor memory drive of claim 7 , wherein the control unit to receive the command from a circuit board implemented within the information processing apparatus.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Feb 4, 2022
From: K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 058957/0124 →
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
MERGER Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: K.K PANGEA
Reel/Frame 058946/0675 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2009
From: KURASHIGE, TAKEHIKO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 022292/0206 →