IP Library Granted Patent US 7,667,334
Granted Patent B2
US 7,667,334 · App. 12/390,549 · Granted Feb 23, 2010

Integrated matching networks and RF devices that include an integrated matching network

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,667,334
App. No.
12/390,549
Granted
Feb 23, 2010
Kind
B2
Abstract

An integrated matching network includes a first die on a substrate, a second die on the substrate, and a metallization layer on the first and second dies. The second die has a capacitance, the metallization layer has an inductance, and the capacitance and inductance together provide a shunt impedance from the first die to the substrate. The integrated matching network includes a first die having a power amplifier, a second die having a capacitor, and a metal interconnect coupled to the power amplifier and the first capacitor. The metal interconnect has an inductance. The capacitor and metal interconnect form a shunt impedance.

Claims (74)

1. An integrated matching network comprising:

a first die comprising an RF active component;

a second die comprising a first capacitor; and

a first metal interconnect coupled to the RF active component and the first capacitor, the first metal interconnect having a first inductance, wherein the first capacitor and the first inductance form a shunt impedance.

2. An integrated matching network of claim 1 , further comprising:

a first bump attachment coupled to the RF active component;

a second bump attachment coupled to the first capacitor; and

wherein the metal interconnect is coupled to the first and second bump attachments, wherein the RF active component comprises a power amplifier, and wherein the first capacitor is an integrated passive device.

3. An integrated matching network of claim 1 , further comprising:

a third die comprising a second capacitor coupled to the shunt impedance; and

a second metal interconnect coupled to the first metal interconnect and the second capacitor, the second metal interconnect having a second inductance, the second inductance and the second capacitor coupled to the shunt impedance forming an output impedance matching network.

4. An integrated matching network of claim 1 , further comprising an inductor component coupled to the first and second dies, the inductor component comprising:

a first contact coupled to the RF active component;

a second contact coupled to the first capacitor;

a first bump attachment coupled to the first contact; and

a second bump attachment coupled to the second contact;

wherein the first metal interconnect is coupled to the first and second bump attachments.

5. An integrated matching network of claim 1 , wherein the first metal interconnect has first and second opposing surfaces; and wherein the integrated matching network further comprises:

a third die comprising a second capacitor;

an inductor component coupled to the first, second, and third dies, the inductor component comprising:

an insulating layer having first and second opposing surfaces and first and second vias, the first surface of the insulating layer coupled to the second surface of the first metal interconnect; and

a second metal interconnect coupled to the second surface of the insulating layer, the first via coupling the second metal interconnect to the second surface of the first metal interconnect;

a first bump attachment coupled to the RF active component;

a second bump attachment coupled to the first capacitor, the first surface of the first metal interconnect coupled to the first and second bump attachments; and

a third bump attachment coupled to the second capacitor, the second via coupling the second metal interconnect to the third bump attachment.

6. An integrated matching network comprising:

a first die having first and second opposing surfaces, wherein the first surface of the first die is coupled to a substrate;

a second die having first and second opposing surfaces and a capacitance, wherein the first surface of the second die is coupled to the substrate; and

an inductive component that includes an insulator substrate and a first metallization layer coupled to the insulator substrate, wherein the first metallization layer is coupled to the second surface of the first die and to the second surface of the second die, wherein the first metallization layer has an inductance, and wherein the capacitance and the inductance together provide a shunt impedance from the first die to the substrate.

7. An integrated matching network of claim 6 , wherein the first die comprises an RF active component, and the second die comprises a capacitor.

8. An integrated matching network of claim 6 , wherein:

the second surface of the first die is coupled to the first metallization layer with a first bump attachment; and

the second die is coupled to the first metallization layer with a second bump attachment.

9. An integrated matching network of claim 6 , further comprising:

a third die coupled to the substrate and to the first die, wherein the third die is coupled to the first die with a second metallization layer.

10. An integrated matching network of claim 9 , wherein:

the first metallization layer is coupled to the second metallization layer with a first via; and

the third die is coupled to the second metallization layer with a second via.

11. An integrated matching network of claim 6 , further comprising:

a third die coupled to the substrate; and

wherein the inductive component comprises

the first metallization layer formed on an insulator layer;

first and second vias formed through the insulator layer; and

a second metallization layer formed on the insulator layer, wherein the first via couples the second metallization layer to the first metallization layer, and the second via couples the second metallization layer to the third die.

12. A radio frequency (RF) device having an integrated matching network, the RF device comprising:

a first substrate;

an RF active die coupled to the first substrate, the RF active die having first and second opposing surfaces, an RF active component, and an output of the RF active component, wherein the first surface of the RF active die is coupled to the first substrate;

a first integrated passive device (IPD) coupled to the first substrate, the first IPD having first and second opposing surfaces, a first capacitance incorporated therewith, and an input, wherein the first surface of the first IPD is coupled to the first substrate; and

a second substrate having a first metal interconnect formed thereon, wherein the first metal interconnect is coupled between the second surface of the die and the second surface of the first IPD in order to couple the output of the RF active component with the input of the first IPD, wherein the first metal interconnect has an inductance that is coupled in series with the first capacitance, and wherein the inductance and the first capacitance provide a matching impedance for the RF active component.

13. The RF device of claim 12 , wherein the RF device has an RF ground, and wherein the first capacitance and the inductance together provide a shunt impedance from the output of the RF active component to the RF ground.

14. The RF device of claim 12 , wherein the first metal interconnect is coupled to the second surface of the RF active die and the second surface of the first IPD.

15. The RF device of claim 12 , further comprising:

a first bump attachment applied to the second surface of the RF active die; and

a second bump attachment applied to the second surface of the first IPD, wherein the first metal interconnect is coupled to the first and second bump attachments.

16. The RF device of claim 12 , wherein the step of coupling a second substrate comprises:

a first contact formed on the second surface of the RF active die;

a first bump attachment applied to the first contact;

a second contact formed on the second surface of the first IPD; and

a second bump attachment applied to the second contact, wherein the first metal interconnect is coupled to the first and second bump attachments.

17. The RF device of claim 12 , further comprising:

a second IPD coupled to the first substrate, wherein the second IPD has first and second opposing surfaces, and wherein the second substrate also is coupled to the second surface of the RF active die, the second surface of the first IPD, and the second surface of the second IPD.

18. The RF device of claim 12 , further comprising:

a second IPD coupled to the first substrate, wherein the second IPD has first and second opposing surfaces, and wherein the first surface of the second IPD is coupled to the first substrate;

a first bump attachment applied to the second surface of the RF active die;

a second bump attachment applied to the second surface of the first IPD, wherein the first metal interconnect is coupled to the first and second bump attachments;

a third bump attachment applied to the second surface of the second IPD; and

a second metal interconnect coupled to the first bump attachment and the third bump attachment.

19. The RF device of claim 18 , wherein the RF device has an RF ground, the first metal interconnect has a first inductance, and the second metal interconnect has a second inductance, and wherein the first inductance and the first capacitance form a shunt impedance to the RF ground, and wherein the second IPD has a second capacitance coupled to the shunt impedance to the RF ground, and wherein the second inductance and the second capacitance coupled to the shunt impedance to the RF ground together form an output impedance matching network.

20. The RF device of claim 12 , further comprising:

a second IPD coupled to the first substrate, wherein the second IPD has first and second opposing surfaces, and wherein the first surface of the second IPD is coupled to the first substrate;

an insulator substrate;

a first metallization layer formed on the insulator substrate to form the first metal interconnect;

first and second vias formed through the insulator substrate; and

a second metallization layer formed on the insulator substrate, wherein the second metallization layer is coupled to the first metallization layer with the first via, and wherein the second metallization layer is coupled to the second surface of the RF active die and the second surface of the first IPD, and the first metallization layer is coupled to the second surface of the second IPD with the second via.

Assignments (34)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0793 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0027 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0866 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0120 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0194 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Sep 3, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 024933/0316 →
SECURITY AGREEMENT Recorded Sep 3, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024933/0340 →
SECURITY AGREEMENT Recorded Sep 1, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024915/0759 →
SECURITY AGREEMENT Recorded Sep 1, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 024915/0777 →