Clock circuit for reducing long term jitter
View Patent ↗A clock circuit generates a reference clock signal based on a resonant frequency of a crystal, generates thermometer-coded signals based on the reference clock signal, and generates a pulse train based on the thermometer-coded signals. The pulse train has a frequency that is a multiple of the frequency of the reference clock signal. Additionally, the clock circuit includes a phase-lock loop for generating an output clock signal based on the pulse train and aligning a phase of the output clock signal with pulses in the pulse train. In various embodiments, the frequency of the reference clock signal is the same as the resonant frequency of the crystal and the frequency of the output clock signal is a multiple of the resonant frequency of the crystal. Moreover, reference clock signal and the output clock signal each have a long-term jitter based on the precision of the resonant frequency of the crystal.
1. A system comprising:
a reference clock signal generator configured to generate a reference voltage and a reference clock signal having a peak amplitude based on the reference voltage;
an analog-to-digital converter coupled to the reference clock signal generator and configured to generate a plurality of thermometer-coded signals based on the reference clock signal and the reference voltage;
a thermometer decoder coupled to the analog-to-digital converter and configured to generate a pulse train based on the plurality of thermometer-coded signals; and
a phase-lock loop coupled to the thermometer decoder and configured to generate an output clock signal based on the pulse train and align a phase of the output clock signal with pulses of the pulse train.
2. The system of claim 1 , wherein the analog-to-digital converted comprises:
a voltage divider configured to generate a plurality of voltages by dividing the reference voltage based on a waveform of the reference clock signal; and
a thermometer circuit coupled to the voltage divider and configured to generate the plurality of thermometer-coded signals based on the reference clock signal and the plurality of voltages.
3. The system of claim 2 , wherein the reference clock signal generator is further configured to generate a quadrature clock signal based on the reference clock signal and the thermometer circuit comprises a plurality of comparators configured to generate the plurality of thermometer-coded signals based on the plurality of voltages, the reference clock signal, and the quadrature clock signal.
4. The system of claim 2 , wherein the thermometer circuit comprises:
a plurality of comparators configured to generate at least some of the thermometer-coded signals of the plurality of thermometer-coded signals based on the plurality of voltages and the reference clock signal; and
a slew rate detector configured to generate a thermometer-coded signal of the plurality of thermometer-coded signals by determining a slew rate of the reference clock signal.
5. The system of claim 1 , wherein the reference clock signal generator comprises:
an automatic gain control circuit configured to generate the reference voltage and to generate a gain control signal based on the reference clock signal and the reference voltage;
a crystal; and
an oscillator coupled to the crystal and the automatic gain control circuit, the oscillator configured to generate the reference clock signal based on a resonant frequency of the crystal and maintain the peak amplitude of the reference clock signal based on the gain control signal.
6. The system of claim 1 , further comprising a phase-lock loop configured to generate an output clock signal based on the pulse train and align a phase of the output clock signal with pulses of the pulse train.
7. The system of claim 1 , wherein the reference clock signal has a sinusoidal waveform.
8. The system of claim 1 , wherein the reference clock signal has a triangular waveform.
9. A system comprising:
a reference clock signal generator configured to generate a reference voltage and a reference clock signal having a peak amplitude based on the reference voltage;
an analog-to-digital converter coupled to the reference clock signal generator and comprising:
a voltage divider configured to generate a plurality of voltages by dividing the reference voltage based on a waveform of the reference clock signal; and
a thermometer circuit coupled to the voltage divider and configured to generate a plurality of thermometer-coded signals based on the reference clock signal and the plurality of voltages;
a thermometer decoder coupled to the analog-to-digital converter and configured to generate a pulse train based on the plurality of thermometer-coded signals; and
a phase-lock loop coupled to the thermometer decoder and configured to generate an output clock signal based on the pulse train and align a phase of the output clock signal with pulses of the pulse train.
10. The system of claim 9 , wherein the reference clock signal generator is further configured to generate a quadrature clock signal based on the reference clock signal, and the thermometer circuit comprises a plurality of comparators configured to generate the plurality of thermometer-coded signals based on the plurality of voltages, the reference clock signal, and the quadrature clock signal.
11. The system of claim 9 , wherein the thermometer circuit comprises:
a plurality of comparators configured to generate at least some of the thermometer-coded signals of the plurality of thermometer-coded signals based on the plurality of voltages and the reference clock signal; and
a slew rate detector configured to generate a thermometer-coded signal of the plurality of thermometer-coded signals by determining a slew rate of the reference clock signal.
12. The system of claim 9 , wherein the reference clock signal generator comprises:
an automatic gain control circuit configured to generate the reference voltage and to generate a gain control signal based on the reference clock signal and the reference voltage;
a crystal; and
an oscillator coupled to the crystal and the automatic gain control circuit, the oscillator configured to generate the reference clock signal based on a resonant frequency of the crystal and maintain the peak amplitude of the reference clock signal based on the gain control signal.
13. The system of claim 9 , wherein the reference clock signal has a sinusoidal waveform.
14. The system of claim 9 , wherein the reference clock signal has a triangular waveform.
15. A method comprising:
generating a reference voltage;
generating a reference clock signal having a peak amplitude based on the reference voltage;
generating a plurality of thermometer-coded signals based on the reference clock signal and the reference voltage;
generating a pulse train based on the thermometer-coded signals;
generating an output clock signal based on the pulse train; and
aligning a phase of the output clock signal with pulses of the pulse train.
16. The method of claim 15 , wherein generating the plurality of thermometer-coded signals further comprises determining a slew rate of the reference clock signal.
17. The method of claim 15 , further comprising generating a quadrature clock signal wherein generating the plurality of thermometer-coded signals further comprises generating the thermometer-coded signals based on the reference clock signal, the reference voltage, and the quadrature clock signal.
18. The method of claim 15 , wherein the reference clock signal has a sinusoidal waveform.
19. The method of claim 15 , wherein the reference clock signal has a triangular waveform.
20. The method of claim 15 , wherein the pulse train has a square waveform.