Trench device structure and fabrication
View Patent ↗A vertical-current-flow device includes a trench which includes an insulated gate and which extends down into first-conductivity-type semiconductor material. A phosphosilicate glass layer is positioned above the insulated gate and a polysilicon layer is positioned above the polysilicate glass layer. Source and body diffusions of opposite conductivity types are positioned adjacent to a sidewall of the trench. A drift region is positioned to receive majority carriers which have been injected by the source, and which have passed through the body diffusion. A drain region is positioned to receive majority carriers which have passed through the drift region. The gate is capacitively coupled to control inversion of a portion of the body region. As an alternative, a dielectric layer may be used in place of the doped glass where permanent charge is positioned in the dielectric layer.
1. A vertical-current-flow device, comprising:
a trench, extending into a semiconductor material, including an insulated gate;
a dielectric layer, which contains a dopant of a first conductivity type for said semiconductor material, above said insulated gate;
source and body diffusions of first and second respective conductivity types in said semiconductor material, adjacent to at least one sidewall of said trench;
a drift region in said semiconductor material, positioned to receive majority carriers which have been injected by said source, and which have passed through said body diffusion;
a drain region of said first conductivity type in said semiconductor material, positioned to receive majority carriers which have passed through said drift region;
a lightly doped diffusion of said first conductivity type, in said semiconductor material, adjacent said dielectric layer; and
a layer of doped polysilicon above said dielectric layer.
2. The vertical-current-flow device of claim 1 , wherein said insulated gate is a split gate.
3. The vertical-current-flow device of claim 2 , wherein said insulated gate includes a polysilicon layer.
4. The vertical-current flow device of claim 1 , further comprising permanent charge in said dielectric layer.
5. A method of operating a vertical-current-flow semiconductor device, comprising the actions of:
using an insulated gate in a trench to control inversion of a body diffusion in a semiconductor material, said trench including a glass layer and a doped polysilicon layer;
in a drift region in said semiconductor material, receiving majority carriers which have been injected by a first-conductivity-type source, and which have passed through said body diffusion and through a lightly doped first-conductivity-type region which is self-aligned to said glass layer; and
in a first-conductivity-type drain region in said semiconductor material, receiving majority carriers which have passed through said drift region;
wherein said body region has a second conductivity type, and said gate is capacitively coupled to control inversion of a portion of said body region;
and wherein said glass layer contains a species which is a first-conductivity-type dopant for said semiconductor material;
and wherein said doped polysilicon layer also contains a species which is a first-conductivity-type dopant for said semiconductor material.
6. The method of claim 5 , wherein said majority carriers are electrons.
7. The method of claim 5 , further comprising a lightly doped diffusion between said source and said body diffusion.
8. The method of claim 5 , wherein said insulated gate is a split gate.
9. The method of claim 5 , further comprising permanent charge in said glass layer.
10. The method of claim 8 wherein said split gate includes a polysilicon layer.
11. The method of claim 5 , wherein said first-conductivity-type dopant is an n-type dopant.
12. The method of claim 5 , wherein said second conductivity type is p-type.
13. The method of claim 12 , wherein said n-type dopant is phosphorus, arsenic or antimony.