IP Library Granted Patent US 8,270,289
Granted Patent B2
US 8,270,289 · App. 12/394,270 · Granted Sep 18, 2012

Methods and apparatus for system framing synchronization control for a framer/mapper/multiplexor device with 1+1 and equipment protection

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Quick Facts
Patent No.
US 8,270,289
App. No.
12/394,270
Granted
Sep 18, 2012
Kind
B2
Abstract

Methods and apparatus are provided for framing synchronization control for a framer/mapper/multiplexor (FMM) device with 1+1 and equipment protection. FMM device are disclosed that synchronize one or more internal signals by changing a phase of the one or more internal signals without changing a frequency of the one or more internal signals based on a desired phase at a destination of each of the one or more internal signals. A programmable synchronization signal may optionally be employed for the synchronization.

Claims (30)

1. A first framer/mapper/multiplexor (FMM) device, comprising:

a protection input port adapted to receive, from a second FMM device, an incoming protection signal corresponding to an incoming high-speed signal received at the second FMM device; and

signal-processing circuitry adapted to generate one or more internal signals from said incoming protection signal, wherein said signal-processing circuitry synchronizes said one or more internal signals by changing a phase of said one or more internal signals without changing a frequency of said one or more internal signals based on a desired phase at a destination of each of said one or more internal signals, wherein said destination is a multiplexer that generates an outgoing high-speed signal from one or more switching-level signals, wherein a programmable synchronization signal is transferred from said first FMM device to said second FMM device and wherein a phase of said incoming protection signal is based on said programmable synchronization signal,

wherein said first FMM device further comprises a high-speed output port adapted to transmit said outgoing high-speed signal to the high-speed network and wherein said one or more internal signals comprises at least one set of one or more incoming low-speed signals received at the second FMM device.

2. The first FMM device of claim 1 , wherein said multiplexer generates said outgoing high-speed signal from switching-level signals corresponding to said at least one set of one or more incoming low-speed signals.

3. The first FMM device of claim 1 , wherein said synchronization is based on said programmable synchronization signal.

4. The first FMM device of claim 1 , wherein said first FMM device communicates with at least one slave FMM device, and wherein said multiplexer is in an outgoing high-speed signal path of said at least one slave FMM device.

5. The first FMM device of claim 4 , wherein said synchronization is based on said programmable synchronization signal generated in said first FMM device.

6. A first framer/mapper/multiplexor (FMM) device, comprising:

a protection input port adapted to receive, from a second FMM device, an incoming protection signal corresponding to an incoming high-speed signal received at the second FMM device; and

signal-processing circuitry adapted to generate one or more internal signals from said incoming protection signal, wherein said signal-processing circuitry synchronizes said one or more internal signals by changing a phase of said one or more internal signals without changing a frequency of said one or more internal signals based on a desired phase at a destination of each of said one or more internal signals, wherein said destination is a switch that selects between switching-level signals from the incoming protection signal and switching-level signals from an incoming working signal, wherein a programmable synchronization signal is transferred from said first FMM device to said second FMM device and wherein a phase of said incoming protection signal is based on said programmable synchronization signal, wherein said alignment is based on said programmable synchronization signal.

7. A first framer/mapper/multiplexor (FMM) device, comprising:

a protection input port adapted to receive, from a second FMM device, an incoming protection signal corresponding to an incoming high-speed signal received at the second FMM device;

a low-speed input port adapted to receive a first set of one or more incoming low-speed signals from a low-speed network;

a high-speed output port adapted to transmit an outgoing high-speed signal to a high-speed network; and

signal-processing circuitry adapted to generate at least one set of one or more switching-level signals from the first set of one or more incoming low-speed signals, wherein said first set of one or more incoming low-speed signals are aligned based on a desired phase at a multiplexer that generates said outgoing high-speed signal from said at least one set of one or more switching-level signals, wherein a programmable synchronization signal is transferred from said first FMM device to said second FMM device and wherein a phase of said incoming protection signal is based on said programmable synchronization signal, wherein said alignment is performed by a frame control module in a mapper device that generates a set of one or more switching-level signals from one or more incoming low-speed signals.

8. The first FMM device of claim 7 , wherein said alignment is performed by a frame control module in a mapper device of a slave FMM device, wherein said mapper device generates a set of one or more switching-level signals from one or more incoming low-speed signals.

9. The first FMM device of claim 8 , wherein said alignment is based on said programmable synchronization signal generated in said first FMM device.

10. A method performed by a first framer/mapper/multiplexor (FMM) device, comprising:

receiving, from a second FMM device, an incoming protection signal corresponding to an incoming high-speed signal received at the second FMM device; and

generating one or more internal signals from said incoming protection signal, wherein said one or more internal signals are synchronized by changing a phase of said one or more internal signals without changing a frequency of said one or more internal signals based on a desired phase at a destination of each of said one or more internal signals, wherein said destination is a multiplexer that generates an outgoing high-speed signal from one or more switching-level signals, wherein a programmable synchronization signal is transferred from said first FMM device to said second FMM device and wherein a phase of said incoming protection signal is based on said programmable synchronization signal, wherein said synchronization is based on said programmable synchronization signal.

11. The method of claim 10 , wherein said first FMM device communicates with at least one slave FMM device, and wherein said multiplexer is in an outgoing high-speed signal path of said at least one slave FMM device.

12. The method of claim 11 , wherein said synchronization is based on said programmable synchronization signal generated in said first FMM device.

13. The method of claim 10 , further comprising the step of generating one or more additional internal signals from said incoming protection signal, wherein said one or more additional internal signals are synchronized by changing a phase of said one or more internal signals without changing a frequency of said one or more internal signals based on a desired phase at a destination of each of said one or more internal signals, wherein said destination is a switch that selects between switching-level signals from the incoming protection signal and switching-level signals from an incoming working signal.

14. A method performed by a first framer/mapper/multiplexor (FMM) device, comprising:

receiving, from a second FMM device, an incoming protection signal corresponding to an incoming high-speed signal received at the second FMM device;

receiving a first set of one or more incoming low-speed signals from a low-speed network;

transmitting an outgoing high-speed signal to a high-speed network; and

generating at least one set of one or more switching-level signals from the first set of one or more incoming low-speed signals, wherein said first set of one or more incoming low-speed signals are aligned based on a desired phase at a multiplexer that generates said outgoing high-speed signal from said at least one set of one or more switching-level signals, wherein a programmable synchronization signal is transferred from said first FMM device to said second FMM device and wherein a phase of said incoming protection signal is based on said programmable synchronization signal, wherein said alignment is performed by a frame control module in a mapper device that generates a set of one or more switching-level signals from one or more incoming low-speed signals.

15. The method of claim 14 , wherein said alignment is performed by a frame control module in a mapper device of a slave FMM device, wherein said mapper device generates a set of one or more switching-level signals from one or more incoming low-speed signals.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 32856/0031 Recorded Nov 18, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 034286/0872 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →