Stacked device assembly with integrated coil and method of forming same
View Patent ↗A stacked semiconductor device assembly ( 20 ) includes a device ( 24 ) having conductive traces ( 34 ) formed therein, and conductive interconnects ( 28 ) electrically connected to the conductive traces ( 34 ). Another device ( 26 ) has conductive traces ( 44 ) formed therein and device pads ( 54 ) formed on an outer surface ( 52 ) of the device ( 26 ). A method ( 120 ) entails attaching ( 84 ) a magnetic core ( 30 ) to an outer surface ( 42 ) of the device ( 24 ) and forming ( 92 ) the conductive interconnects ( 28 ) on the outer surface ( 42 ) using a stud bumping technique such that the interconnects ( 28 ) surround the magnetic core ( 30 ). The conductive interconnects ( 28 ) are coupled ( 126 ) with the device pads ( 54 ) using thermocompression bonding to couple the device ( 26 ) with the device ( 24 ) to form a continuous device coil ( 22 ) wrapped around the magnetic core ( 30 ) from an alternating electrical connection of the traces ( 34 ), the conductive interconnects ( 28 ), and the traces ( 44 ).
1. A method comprising:
providing a first device, said first device having a plurality of first conductive traces formed at a first interconnect level;
forming conductive interconnects on a first outer surface of said first device, said conductive interconnects being electrically connected to said first conductive traces, and each of said conductive interconnects extending above said first outer surface of said first device;
providing a second device, said second device having a plurality of second conductive traces formed at a second interconnect level;
forming device pads on a second outer surface of said second device, said device pads being electrically connected to said second conductive traces;
coupling said second device to said first device via attachment of said conductive interconnects to said device pads to provide a device assembly, said device assembly including a continuous device coil formed from alternating electrical connection of said first conductive traces, said conductive interconnects, and said second conductive traces.
2. A method as claimed in claim 1 further comprising attaching a magnetic core to said first outer surface of said first device such that said conductive interconnects are positioned at opposing sides of said magnetic core.
3. A method as claimed in claim 2 wherein said attaching operation is performed prior to said forming said conductive interconnects on said first outer surface of said first device.
4. A method as claimed in claim 1 wherein said forming said conductive interconnects on said first outer surface of said first device comprises utilizing a stud bumping technique to form said conductive interconnects as stud bumps.
5. A method as claimed in claim 1 wherein:
said forming said conductive interconnects forms said conductive interconnects in a staggered formation; and
said forming said device pads forms said device pads in said staggered formation to correspond with an orientation of said conductive interconnects.
6. A method as claimed in claim 1 wherein:
said forming said conductive interconnects forms said conductive interconnects from a noble metal; and
said forming said device pads forms said device pads from said noble metal.
7. A method as claimed in claim 6 wherein said noble metal is gold.
8. A method as claimed in claim 1 wherein said coupling comprises performing thermal compression bonding of said device pads with said conductive interconnects.
9. A method as claimed in claim 1 wherein:
said providing said first device provides said first device having a plurality of third conductive traces formed at said first interconnect level;
said providing said second device provides said second device having a plurality of fourth conductive traces formed at said second interconnect level;
said forming said conductive interconnects includes forming second conductive interconnects on said first outer surface of said first device, said second conductive interconnects being electrically connected to said third conductive traces, and each of said second conductive interconnects extending above said first outer surface of said first device; and
said forming said device pads includes forming second device pads on said second outer surface of said second device at said second openings, said second device pads being electrically connected to said fourth conductive traces, and following said coupling operation, said device assembly further includes a second continuous device coil formed from alternating electrical connection of said third conductive traces, said second conductive interconnects, and said fourth conductive traces, said second continuous device coil being electrically isolated from said continuous device coil.
10. A method as claimed in claim 9 wherein:
said providing said first device provides said first device having said first conductive traces in alternating arrangement with said third conductive traces; and
said providing said second device provides said second device having said second conductive traces in alternating arrangement with said fourth conductive traces.
11. A method as claimed in claim 1 further comprising:
providing a wafer including a plurality of first devices, said first device being one of said plurality of first devices, each of said plurality of first devices having said plurality of first conductive traces formed at said first interconnect level, wherein said forming said conductive interconnects forms said conductive interconnects on said first outer surface of said each of said plurality of first devices;
said providing a second device provides a plurality of second devices, said second device being one of said plurality of second devices, each of said plurality of second devices having said plurality of second conductive traces formed at said second interconnect level, wherein said forming said device pads forms said device pads on said second outer surface of said each of said plurality of second devices;
said coupling operation couples one each of said plurality of second devices to one each of said plurality of first devices to provide a plurality of device assemblies, said device assembly being one of said device assemblies; and
said method further comprises separating said wafer between said device assemblies to provide a plurality of separated devices assemblies, each of said separated device assemblies including said continuous device coil.
12. A device assembly comprising:
a first device having a plurality of first conductive traces formed at a first interconnect level;
a plurality of conductive interconnects extending above a first outer surface of said first device, said conductive interconnects being electrically connected to said first conductive traces; and
a second device having a plurality of second conductive traces formed at a second interconnect level, said second device including device pads at selected locations on a second outer surface of said second device, said device pads being electrically connected to said second conductive traces, and said conductive interconnects being coupled with corresponding ones of said device pads to form a continuous device coil formed from alternating electrical connection of said first conductive traces, said conductive interconnects, and said second conductive traces.
13. A device assembly as claimed in claim 12 further comprising a magnetic core interposed between said first device and said second device, said continuous device coil wrapping around said magnetic core.
14. A device assembly as claimed in claim 13 wherein opposing surfaces of said magnetic core abut said first and second outer surfaces.
15. A device assembly as claimed in claim 12 wherein said conductive interconnects include a plurality of stud bumps.
16. A device assembly as claimed in claim 12 wherein said device pads and said stud bumps are formed from a noble metal.
17. A device assembly as claimed in claim 12 wherein:
said first device further includes a plurality of third conductive traces formed at said first interconnect level;
said second device further includes a plurality of fourth conductive traces formed at said second interconnect level and second device pads at selected locations on said second outer surface of said second device, said second device pads being electrically connected to said fourth conductive traces; and
said device assembly further includes a plurality of second conductive interconnects extending above said first outer surface of said first device, said second conductive interconnects being electrically connected to said third conductive traces, and said second conductive interconnects being coupled with corresponding ones of said second device pads to form a second continuous device coil formed from alternating electrical connection of said third conductive traces, said second conductive interconnects, and said fourth conductive traces, said second continuous device coil being electrically isolated from said continuous device coil.
18. A device assembly as claimed in claim 17 wherein:
said first conductive traces are in alternating arrangement with said third conductive traces; and
said second conductive traces are in alternating arrangement with said fourth conductive traces.
19. A method comprising:
providing a wafer including a plurality of first devices, each of said plurality first devices including a plurality of first conductive traces formed at a first interconnect level;
attaching a magnetic core to a first outer surface of said each first device;
forming stud bumps on said first outer surface of said each first device positioned at opposing sides of said magnetic core, said stud bumps being formed by utilizing a stud bumping technique, said stud bumps being electrically connected to said first conductive traces, and each of said stud bumps extending above said first outer surface of said each first device;
providing a plurality of second devices, each of said second devices having a plurality of second conductive traces formed at a second interconnect level;
forming device pads on a second outer surface of said each second device, said device pads being electrically connected to said second conductive traces;
coupling one each of said plurality of second devices to one each of said plurality of first devices via attachment of said stud bumps to said device pads to provide a plurality of device assemblies; and
separating said wafer between said device assemblies to provide a plurality of separated devices assemblies, each of said separated device assemblies including a continuous device coil formed from alternating electrical connection of said first conductive traces, said stud bumps, and said second conductive traces.
20. A method as claimed in claim 19 wherein:
said forming said stud bumps forms said stud bumps from a noble metal;
said forming said device pads forms said device pads from said noble metal; and
said coupling comprises utilizing thermal compression bonding of said device pads with said stud bumps.