Pseudo hybrid structure for low K interconnect integration
View Patent ↗A method and apparatus are described for fabricating an ultra low-k interconnect structure by depositing and curing a first via layer ( 43 ) of ultra low dielectric constant (ULK) material, depositing a second uncured trench layer ( 51 ) of the same ULK material, selectively etching a via opening ( 62 ) and trench opening ( 72 ) with a dual damascene etch process which uses a trench etch end point signal from the chemical differences between uncured trench layer ( 51 ) and the underlying cured via layer ( 43 ), and then curing the second trench layer ( 83 ) before forming an interconnect structure ( 91 ) by filling the trench opening ( 72 ) and via opening ( 62 ) with an interconnection material so that there is no additional interface or higher dielectric constant material left behind.
1. A method of fabricating dual damascene interconnections on a substrate structure, comprising:
forming a first dielectric layer over a substrate structure, where the first dielectric layer is formed from a first material which has a dielectric constant of 2.5 or less and which has a predetermined chemical composition;
treating at least part of the first dielectric layer to modify the predetermined chemical composition, thereby forming a treated first dielectric layer;
forming a second dielectric layer directly on the treated first dielectric layer, where the second dielectric layer is formed from the first material;
partially etching the second dielectric layer and the treated first dielectric layer to form a via opening;
partially etching the second dielectric layer to form a trench opening which is connected to the via opening and extends laterally beyond the via opening;
treating at least part of the second dielectric layer so that the second dielectric layer has a dielectric constant that is substantially identical to the dielectric constant of the treated first dielectric layer; and
forming an interconnect structure by filling the trench opening and via opening with an interconnection material.
2. The method of claim 1 , where forming a first dielectric layer comprises depositing a first dielectric material comprising porogen to a predetermined via layer thickness.
3. The method of claim 1 , where treating at least part of the first dielectric layer comprises applying ultraviolet radiation and heat to the first dielectric layer.
4. The method of claim 1 , where treating at least part of the first dielectric layer comprises applying an electron beam to the first dielectric layer.
5. The method of claim 1 , where forming a second dielectric layer comprises depositing a second dielectric material comprising porogen to a predetermined trench layer thickness, where the first and second dielectric layers are initially formed with the same dielectric material.
6. The method of claim 1 , where partially etching the second dielectric layer comprises anisotropically etching the second dielectric layer using a trench etch end point signal from chemical differences between the second dielectric layer and the treated first dielectric layer to control formation of the trench opening.
7. The method of claim 1 , where treating at least part of the second dielectric layer comprises applying ultraviolet radiation, an ultraviolet-assisted thermal cure, or electron beam curing process to the second dielectric layer.
8. The method of claim 1 , where the steps of forming the first dielectric layer, treating at least part of the first dielectric layer, and forming the second dielectric layer are performed sequentially in a cluster tool comprising a deposition chamber and an ultraviolet cure chamber connected on a central cluster chamber.
9. A method of making a semiconductor device, comprising:
forming a first cured low-k dielectric layer over a semiconductor substrate having a first dielectric constant value;
forming a second uncured low-k dielectric layer directly on the first cured low-k dielectric layer, where the first cured low-k dielectric layer has a different chemical composition from the second uncured low-k dielectric layer;
selectively etching the second uncured low-k dielectric layer to form a trench opening having a predetermined depth, where the different chemical composition of the first cured low-k dielectric layer is used to generate a trench etch end point signal to control the predetermined depth of the trench opening;
selectively etching the first cured low-k dielectric layer to form a via opening;
curing at least part of the second uncured low-k dielectric layer after forming the trench opening and via opening to form a second cured low-k dielectric layer having a second dielectric constant value that is substantially equal to the first dielectric constant value.
10. The method of claim 9 , where forming the first cured low-k dielectric layer comprises:
forming a first uncured low-k dielectric layer over the semiconductor substrate, where the first uncured low-k dielectric layer is formed from a material which has a dielectric constant of 2.5 or less; and
curing at least part of the first uncured low-k dielectric layer to form the first cured low-k dielectric layer.
11. The method of claim 9 , where forming the first cured low-k dielectric layer comprises depositing a first low-k dielectric layer comprising porogen.
12. The method of claim 9 , where forming the first cured low-k dielectric layer comprises applying ultraviolet radiation to a deposited porogen-containing low-k dielectric layer before forming the second uncured low-k dielectric layer.
13. The method of claim 9 , where forming the first cured low-k dielectric layer comprises applying an electron beam to a deposited porogen-containing low-k dielectric layer before forming the second uncured low-k dielectric layer.
14. The method of claim 9 , where forming the second uncured low-k dielectric layer comprises depositing a second low-k dielectric layer comprising porogen to a predetermined trench layer thickness, where the first and second low-k dielectric layers are initially formed with the same dielectric material.
15. The method of claim 9 , where curing at least part of the second uncured low-k dielectric layer comprises applying an ultraviolet radiation, ultraviolet-assisted thermal cure, or electron beam curing process to the second uncured low-k dielectric layer.
16. The method of claim 9 , where selectively etching the second uncured low-k dielectric layer to form the trench opening occurs before selectively etching the first cured low-k dielectric layer to form the via opening.
17. The method of claim 9 , where selectively etching the second uncured low-k dielectric layer to form the trench opening occurs after selectively etching the first cured low-k dielectric layer to form the via opening.
18. The method of claim 9 , where forming the first cured low-k dielectric layer comprises:
depositing a porous ultra-low k layer comprising one or more layers of an inorganic matrix of polymethylsilsesquioxane containing a pore-generating material or a PECVD porous dielectric layer formed from a silicon base precursor and porogen; and
curing the porous ultra-low k layer to form the first cured low-k dielectric layer.
19. The method of claim 9 , further comprising forming an interconnect structure by filling at least part of the trench opening and via opening with a conductive layer comprising aluminum, tungsten or copper.
20. A method of fabricating dual damascene interconnections, comprising:
(a) depositing a first ultra low-k dielectric material to form a first dielectric layer over a substrate;
(b) curing the first dielectric layer to form a first cured dielectric layer;
(c) depositing the first dielectric material to form a second uncured dielectric layer directly on the first cured dielectric layer;
(d) forming a trench opening in the second uncured dielectric layer;
(e) curing the second uncured dielectric layer after forming the trench opening to form a second cured dielectric layer, thereby substantially eliminating any chemical difference between the first cured dielectric layer and the second cured dielectric layer; and
(f) completing interconnections by filling at least the trench opening with an interconnection material.
21. The method of claim 20 , where forming a trench opening comprises forming a trench opening in the second uncured dielectric layer using a chemical difference between the first cured dielectric layer and the second uncured dielectric layer to generate a trench etch endpoint signal.