IP Library Granted Patent US 7,916,522
Granted Patent B2
US 7,916,522 · App. 12/400,262 · Granted Mar 29, 2011

Semiconductor memory device

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Quick Facts
Patent No.
US 7,916,522
App. No.
12/400,262
Granted
Mar 29, 2011
Kind
B2
Abstract

A semiconductor memory device includes n resistance change elements which are arranged in one cell, have a low-resistance state and a high resistance state, are connected in series or parallel, have different resistance values in the same resistance state, and change between the low-resistance state and the high-resistance state under different conditions, and a write circuit which is connected to one end of the n resistance change elements, and applies a pulse current m (1≦m≦n) times to the n resistance change elements during a write operation. Letting Im be a current value of an mth pulse current, condition I 1 >I 2 > . . . >Im holds.

Claims (33)

1. A semiconductor memory device comprising:

n resistance change elements which are arranged in one cell, have a low-resistance state and a high resistance state, are connected in series or parallel, have different resistance values in the same resistance state, and change between the low-resistance state and the high-resistance state under different conditions; and

a write circuit which is connected to one end of the n resistance change elements, and applies a pulse current m (1≦m≦n) times to the n resistance change elements during a write operation,

wherein letting Im be a current value of an mth pulse current, condition I 1 >I 2 > . . . >Im holds.

2. The device according to claim 1 , wherein letting tm be a pulse width of the mth pulse current, condition t 1 =t 2 = . . . =tm holds.

3. The device according to claim 1 , wherein

the resistance change element is a magnetoresistive effect element,

the semiconductor memory device is a spin transfer torque writing type magnetic random access memory, and

information is written in order from the magnetoresistive effect element having a largest reversal current amount which changes between the low-resistance state and the high-resistance state.

4. The device according to claim 3 , wherein

the n magnetoresistive effect elements are stacked on a substrate,

a sectional structure of the n magnetoresistive effect elements has a tapered shape as a whole, and

areas of tunnel barrier junctions of the n magnetoresistive effect elements are different.

5. The device according to claim 3 , wherein if the n magnetoresistive effect elements are two magnetoresistive effect elements, one magnetoresistive effect element has a single-junction structure, and the other magnetoresistive effect element has a double-junction structure.

6. The device according to claim 3 , wherein the n magnetoresistive effect elements are different in one of a composition and volume of a free layer and a volume and film thickness of a barrier layer.

7. The device according to claim 1 , which further comprises a transistor having a current path whose one end is connected to the other end of the n resistance change elements, and

in which the n resistance change elements are arranged in order such that a resistance change element having a highest resistance in the same resistance state is positioned closest to one end of the current path of the transistor.

8. A semiconductor memory device comprising:

n resistance change elements which are arranged in one cell, have a low-resistance state and a high resistance state, are connected in series or parallel, have different resistance values in the same resistance state, and changes between the low-resistance state and the high-resistance state under different conditions; and

a write circuit which is connected to one end of the n resistance change elements, and applies a pulse current m (1≦m≦n) times to the n resistance change elements during a write operation,

wherein letting tm be a pulse width of an mth pulse current, condition t 1 >t 2 > . . . >tm holds.

9. The device according to claim 8 , wherein letting Im be a current value of the mth pulse current, condition I 1 =I 2 = . . . =Im holds.

10. The device according to claim 8 , wherein

the resistance change element is a magnetoresistive effect element,

the semiconductor memory device is a spin transfer torque writing type magnetic random access memory, and information is written in order from the magnetoresistive effect element having a largest pulse width which changes between the low-resistance state and the high-resistance state.

11. The device according to claim 10 , wherein

the n magnetoresistive effect elements are stacked on a substrate,

a sectional structure of the n magnetoresistive effect elements has a tapered shape as a whole, and

areas of tunnel barrier junctions of the n magnetoresistive effect elements are different.

12. The device according to claim 10 , wherein if the n magnetoresistive effect elements are two magnetoresistive effect elements, one magnetoresistive effect element has a single-junction structure, and the other magnetoresistive effect element has a double-junction structure.

13. The device according to claim 10 , wherein the n magnetoresistive effect elements are different in one of a composition and volume of a free layer and a volume and film thickness of a barrier layer.

14. The device according to claim 8 , which further comprises a transistor having a current path whose one end is connected to the other end of the n resistance change elements, and

in which the n resistance change elements are arranged in order such that a resistance change element having a highest resistance in the same resistance state is positioned closest to one end of the current path of the transistor.

Assignments (4)
DE-MERGER Recorded Dec 12, 2019
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051260/0291 →
MERGER Recorded Dec 12, 2019
From: TOSHIBA MEMORY CORPORATION; K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051262/0776 →
CHANGE OF NAME AND ADDRESS Recorded Dec 12, 2019
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 051262/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2009
From: ITAGAKI, KIYOTARO; INABA, TSUNEO; UEDA, YOSHIHIRO; ASAO, YOSHIAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 022373/0253 →