CIRCUIT SYSTEM
One aspect of the embodiment is related to a circuit system having multiple circuit blocks each of which operates upon reception of power supply. The circuit system includes multiple circuit blocks each of which operates upon reception of power, multiple switch elements which are provided respectively to the multiple circuit blocks and each of which supplies and cuts off power to the corresponding circuit block upon reception of control and a power control unit that controls each of the multiple switch elements to cause the switch element to supply and cut off power to the corresponding circuit block.
1 . A circuit system comprising:
a plurality of circuit blocks each of which operates upon reception of power;
a plurality of switch elements which are provided respectively to the plurality of circuit blocks, and each of which supplies and cuts off power to the corresponding circuit block upon reception of control; and
a power control unit that controls each of the plurality of switch elements to cause the switch element to supply and cut off power to the corresponding circuit block.
2 . The circuit system according to claim 1 , further comprising a data retreat memory, wherein
one of the plurality of circuit blocks is a volatile memory, and
the power control unit cuts off power supply to the volatile memory after retreating data stored in the volatile memory to the data retreat memory, and recovers the data retreated to the data retreat memory to the volatile memory after restarting power supply to the volatile memory.
3 . The circuit system according to claim 2 , further comprising:
a CPU that executes a program; and
a DMA that transfers data between the volatile memory and the data retreat memory without intermediation of the CPU, wherein
the power control unit is a function that is achieved by the program being executed by the CPU, and causes the DMA to transfer data between the volatile memory and the data retreat memory in association with the power supply and cutoff to the volatile memory.
4 . The circuit system according to claim 1 , wherein the power control unit includes a plurality of power cutoff modes each having a different combination of a circuit block that cuts off power supply and a circuit block that continues power supply among the plurality of circuit blocks.
5 . The circuit system according to claim 4 , wherein the power control unit executes a first power cutoff mode among the plurality of power cutoff modes on the basis of an instruction from an external section, and executes a second power cutoff mode in which time required for an operation recovery at the time of restarting power supply is shorter than that in the first power cutoff mode, among the plurality of power cutoff modes in accordance with a condition of the circuit system.
6 . The circuit system according to claim 1 , wherein the plurality of circuit blocks, the plurality of switch elements and the power control unit are included in one integrated circuit package.
7 . A program storage device storing a program executed by a CPU in a circuit system including: the CPU that executes the program; a plurality of circuit blocks each of which operates upon reception of power; and a plurality of switch elements which are provided respectively to the plurality of circuit blocks and each of which supplies and cuts off power to the corresponding circuit block upon reception of control, wherein
the CPU is caused to control each of the plurality of switch elements to cause the switch element to supply and cut off power to the corresponding circuit block.
8 . The program storage device according to claim 7 , wherein
the circuit system further includes a data retreat memory,
one of the plurality of circuit blocks is a volatile memory, and
the program causes the CPU to cut off power supply to the volatile memory after data stored in the volatile memory is retreated to the data retreat memory, and recover the data retreated to the data retreat memory to the volatile memory after power supply to the volatile memory is restarted.
9 . The program storage device according to claim 8 , wherein
the circuit system further includes a DMA that transfers data between the volatile memory and the data retreat memory without intermediation of the CPU, and
the program is executed by the CPU to cause the DMA to transfer data between the volatile memory and the data retreat memory in association with the power supply and cutoff to the volatile memory.
10 . The program storage device according to claim 7 , wherein
the program causes the CPU to control the power supply and cutoff by a plurality of power cutoff modes each having a different combination of a circuit block that cuts off power supply and a circuit block that continues power supply among the plurality of circuit blocks.
11 . The program storage device according to claim 10 , wherein
the program causes the CPU to execute a first power cutoff mode among the plurality of power cutoff modes on the basis of an instruction from an external section, and execute a second power cutoff mode in which time required for an operation recovery at the time of restarting power supply is shorter than that in the first power cutoff mode, among the plurality of power cutoff modes in accordance with a condition of the circuit system.