IP Library › Granted Patent US 8,230,186
Granted Patent B2
US 8,230,186 · App. 12/411,811 · Granted Jul 24, 2012

Hybrid recording device

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,230,186
App. No.
12/411,811
Granted
Jul 24, 2012
Kind
B2
Abstract

A hybrid recording device having a non-volatile semiconductor memory and a recording magnetic disk includes a mapping unit that maps a first recording area in the recording magnetic disk and a second recording area in the non-volatile semiconductor memory, and a controller that controls an access to the second recording area mapped by the mapping unit when there is an access instruction to the first recording area.

Claims (21)

1. A hybrid recording device having a non-volatile semiconductor memory and a recording magnetic disk, comprising:

a computer controller to execute

mapping a first recording area in the recording magnetic disk and a second recording area in the non-volatile semiconductor memory; and

controlling an access to the mapped second recording area when there is an access instruction to the first recording area,

wherein the mapping maps the first recording area and the second recording area while allocating an attribute representing one or more of a redundancy area and/or a speed-up area to the first recording area and/or the second recording area, and

in a case where a writing command is received as an access instruction to the first recording area, the computer controller executes writing common data into the first recording area and the second recording area when the attribute representing the redundancy area is allocated to the first recording area, and the computer controller executes writing latest data into the second recording area and also writing the latest data of the second recording area into the first recording area under only a predetermined condition when the attribute representing the speed-up area is allocated to the first recording area.

2. The hybrid recording device according to claim 1 , wherein data set in the redundancy area and the speed-up area are read from the non-volatile semiconductor memory.

3. The hybrid recording device according to claim 1 , wherein the device is connectable to a host, and a communication by the host indicates a data block and the mapping is according to a mapping table associating a recording area corresponding to the data block in the recording magnetic disk with a part of the recording area in the non-volatile semiconductor memory as the first recording area and the second recording area, respectively, and allocating the attribute to every pair of the first recording area and the second recording area.

4. The hybrid recording device according to claim 3 , wherein when data of any one of the first recording area and the second recording area which are mapped while the attribute of the redundancy area is allocated thereto is broken, the computer controller executes restoring the broken data from normal data of the other recording area.

5. The hybrid recording device according to claim 3 , wherein when both data of the first recording area and the second recording area which are mapped while the attribute of the redundancy area is allocated thereto are not matched with each other, the computer controller executes matching both data to a lower error rate by subjecting both data to error-correcting code processing.

6. The hybrid recording device according to claim 1 , wherein when data of any one of the first recording area and the second recording area which are mapped while the attribute of the redundancy area is allocated thereto is broken, the computer controller executes restoring the broken data from normal data of the other recording area.

7. The hybrid recording device according to claim 6 , wherein when both data of the first recording area and the second recording area which are mapped while the attribute of the redundancy area is allocated thereto are not matched with each other, the computer controller executes matching both data to a lower error rate by subjecting both data to error-correcting code processing.

8. The hybrid recording device according to claim 1 , wherein when both data of the first recording area and the second recording area which are mapped while the attribute of the redundancy area is allocated thereto are not matched with each other, the computer controller executes matching both data to a lower error rate by subjecting both data to error-correcting code processing.

9. The hybrid recording device according to claim 1 , wherein when data of any one of the first recording area and the second recording area which are mapped while the attribute of the speed-up area is allocated thereto is broken, the computer controller executes restoring the broken data from normal data of the other recording area.

10. A hybrid recording device for receiving as an access instruction a read command and a write command transmitted from a host and receiving a specific instruction as a registering instruction, and accesses a recording area in a recording magnetic disk when receiving the access instruction, comprising:

a non-volatile semiconductor memory; and

a computer controller to execute

allocating a first recording area in the recording magnetic disk corresponding to a reception block from the host into the non-volatile semiconductor memory to dualize data when receiving the registering instruction from the host; and

accessing the first recording area allocated in the non-volatile semiconductor memory by the allocating when an access instruction to the first recording area is received from the host,

wherein the allocating allocates the first recording area in the recording magnetic disk corresponding to a reception block from the host into the non-volatile semiconductor memory as a redundancy area to dualize data when a registering instruction representing redundancy is received as the registering instruction from the host, and allocates the first recording area in the recording magnetic disk corresponding to a reception block from the host into the non-volatile semiconductor memory as a speed-up area to dualize data when receiving a registering instruction representing speed-up as the registering instruction from the host, and

in a case where a writing command is received as an access instruction to the first recording area, the computer controller executes writing common data into the first recording area and the second recording area when a redundancy area of the first recording area is allocated in the non-volatile semiconductor memory, and also executes writing latest data into the second recording area when a speed-up area of the first recording area is allocated in the non-volatile semiconductor memory and writing the latest data of the second recording area into the first recording area under only a predetermined condition.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2012
From: TOSHIBA STORAGE DEVICE CORPORATION
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 027830/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2009
From: FUJITSU LIMITED
To: TOSHIBA STORAGE DEVICE CORPORATION
Reel/Frame 023526/0348 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2009
From: TODA, SEIJI
To: FUJITSU LIMITED
Reel/Frame 022480/0338 →
Priority Claims (1)
JP 2008-83705 · Mar 27, 2008 · national
Continuity (1)
Related Publication 20090245049A1 · Oct 1, 2009