IP Library Granted Patent US 7,916,053
Granted Patent B2
US 7,916,053 · App. 12/414,245 · Granted Mar 29, 2011

Analog-to-digital conversion module adapted for irregular sampling sequences

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Quick Facts
Patent No.
US 7,916,053
App. No.
12/414,245
Granted
Mar 29, 2011
Kind
B2
Abstract

Apparatus and methods are provided for performing a sampling sequence for a plurality of samples. An analog-to-digital conversion module comprises a sampling module, a register, and a sampling control module coupled to the sampling module and the register. The sampling module is configured to convert analog signals into corresponding digital values in response to sampling trigger signals and the register is configured to maintain scan mode criteria for a plurality of samples. The sampling control module is configured to identify a scan mode criterion for a respective sample of the plurality of samples, automatically generate a sampling trigger signal when the scan mode criterion for the respective sample is equal to a first value, and generate the sampling trigger signal in response to a timing trigger signal when the scan mode criterion for the respective sample is equal to a second value.

Claims (59)

1. An analog-to-digital conversion module comprising:

a sampling module configured to convert analog signals into corresponding digital values in response to sampling trigger signals;

a register configured to maintain scan mode criteria for a plurality of samples; and

a sampling control module coupled to the register and the sampling module, the sampling control module being configured to receive a timing trigger signal, wherein the sampling control module is configured to:

identify a scan mode criterion for a respective sample of the plurality of samples;

automatically generate a sampling trigger signal when the scan mode criterion for the respective sample is equal to a first value; and

generate the sampling trigger signal in response to the timing trigger signal when the scan mode criterion for the respective sample is equal to a second value.

2. The analog-to-digital conversion module of claim 1 , wherein the sampling module is configured to automatically generate the sampling trigger signal when the scan mode criterion for the respective sample is equal to the first value by generating the sampling trigger signal at a predetermined time after a preceding sampling trigger signal.

3. The analog-to-digital conversion module of claim 1 , the plurality of samples being based on a sampling sequence, wherein the sampling control module is configured to:

identify a first scan mode criterion corresponding to a first sample of the sampling sequence;

automatically generate a first sampling trigger signal when the first scan mode criterion is equal to the first value; and

generate the first sampling trigger signal in response to a first timing trigger signal when the first scan mode criterion is equal to the second value.

4. The analog-to-digital conversion module of claim 3 , the first sampling trigger signal occurring at a first sampling time, wherein the sampling control module is configured to:

identify a second scan mode criterion corresponding to a second sample of the sampling sequence in response to generating the first sampling trigger signal; and

automatically generate a second sampling trigger signal at a second sampling time when the second scan mode criterion is equal to the first value, the second sampling time being equal to a predetermined time after the first sampling time; and

generate the second sampling trigger signal in response to a second timing trigger signal when the second scan mode criterion is equal to the second value.

5. The analog-to-digital conversion module of claim 1 , wherein the sampling control module is configured to generate an interrupt signal in response to generating the sampling trigger signal.

6. The analog-to-digital conversion module of claim 1 , wherein the sampling module comprises an analog-to-digital converter coupled to the sampling control module, the analog-to-digital converter having an input, wherein the analog-to-digital converter is configured to convert an analog signal at the input to a corresponding digital value in response to the sampling trigger signal.

7. The analog-to-digital conversion module of claim 6 , wherein the sampling module comprises a multiplexer coupled to the sampling control module, the multiplexer having a plurality of multiplexer inputs and a multiplexer output coupled to the input of the analog-to-digital converter, wherein:

the sampling control module is configured to select a first input of the plurality of multiplexer inputs corresponding to the respective sample of the plurality of samples when the scan mode criterion for the respective sample is equal to the first value, the first input corresponding to a first analog signal; and

the analog-to-digital converter is configured to convert the first analog signal to a digital value in response to the sampling trigger signal.

8. The analog-to-digital conversion module of claim 6 , wherein the sampling module comprises a demultiplexer coupled to the sampling control module, the demultiplexer having a plurality of demultiplexer outputs and an input configured to receive a digital value from the analog-to-digital converter, wherein the sampling control module is configured to select a first output of the plurality of demultiplexer outputs corresponding to the respective sample of the plurality of samples when the scan mode criterion for the respective sample is equal to the first value.

9. A controller comprising:

a first module configured to generate a plurality of sampling trigger signals based on a first sampling sequence for a first cycle period, the first sampling sequence comprising a plurality of samples, wherein each sampling trigger signal of the plurality of sampling trigger signals is configurable to either be automatically generated or generated at a respective sampling time within the first cycle period based on the first sampling sequence; and

an analog-to-digital conversion module configured to convert an analog signal into a corresponding digital value in response to the plurality of sampling trigger signals resulting in the plurality of samples.

10. The controller of claim 9 , wherein the first module is configured to automatically generate the a sampling trigger signal of the plurality of sampling trigger signals at a predetermined time after a sampling time associated with an immediately preceding sampling trigger signal of the plurality of sampling trigger signals.

11. The controller of claim 9 , further comprising a register configured to maintain scan mode criteria for the plurality of samples, wherein for each sample of the plurality of samples, the first module is configured to:

identify a scan mode criterion for a respective sample of the plurality of samples;

automatically generate a sampling trigger signal at a predetermined time after an immediately preceding sampling trigger signal when the scan mode criterion for the respective sample is equal to a first value; and

generate the sampling trigger signal in response to a timing trigger signal when the scan mode criterion for the respective sample is equal to a second value.

12. The controller of claim 9 , wherein:

the analog-to-digital conversion module is configured to generate an interrupt signal in response to obtaining a final sample of the plurality of samples based on the first sampling sequence; and

in response to the interrupt signal, the first module is configured to:

determine a second sampling sequence for a second cycle period, the second sampling sequence comprising a second plurality of samples; and

generate a second plurality of sampling trigger signals based on the second sampling sequence, wherein each sampling trigger signal of the second plurality of sampling trigger signals is configurable to either be automatically generated or generated at a respective sampling time within the second cycle period based on the second sampling sequence.

13. A method for regulating a signal level at a regulated output, the method comprising:

regulating the signal level by providing a pulse-width modulated signal to a switching circuit; and

sampling by an analog-to-digital conversion module the signal level at a plurality of sampling times, wherein the analog-to-digital conversion module converts the signal level to a corresponding digital value at each sampling time of the plurality of sampling times resulting in a plurality of samples for a first modulation cycle, wherein at least some sampling times of the plurality of sampling times are nonperiodic with respect to the other sampling times of the plurality of sampling times.

14. The method of claim 13 , further comprising:

regulating the signal level by providing a second pulse-width modulated signal to the switching circuit, the second pulse-width modulated signal being based on the plurality of samples for the first modulation cycle; and

sampling by the analog-to-digital conversion module the signal level at a second plurality of sampling times, wherein the analog-to-digital conversion module converts the signal level to a corresponding digital value at each sampling time of the second plurality of sampling times resulting in a second plurality of samples for a second modulation cycle, wherein at least some of the sampling times of the second plurality of sampling times are nonperiodic with respect to the other sampling times of the second plurality of sampling times.

15. The method of claim 13 , wherein sampling the signal level at the plurality of sampling times comprises:

sampling the signal level at a first sampling time of the plurality of sampling times resulting in a first sample; and

automatically sampling the signal level a second sampling time of the plurality of sampling times resulting in a second sample, wherein the second sampling time is equal to a predetermined time after the first sampling time.

16. The method of claim 15 , wherein sampling the signal level at the plurality of sampling times further comprises sampling the signal level at a third sampling time of the plurality of sampling times resulting in a third sample of the plurality of samples, wherein the third sample is nonperiodic with respect to the first sample and the second sample.

17. The method of claim 13 , wherein sampling the signal level at the plurality of sampling times comprises obtaining a first sample of the plurality of samples at a first sampling time of the plurality of sampling times by:

identifying a first scan mode criterion for the first sample;

if the first scan mode criterion is equal to a first value, automatically converting the signal level to a first digital value;

if the first scan mode criterion is equal to a second value, converting the signal level to the first digital value in response to a timing trigger signal corresponding to the first sampling time; and

storing the first digital value in memory, wherein the first digital value is associated with the first sample.

18. The method of claim 17 , wherein sampling the signal level at the plurality of sampling times further comprises obtaining a second sample of the plurality of samples at a second sampling time of the plurality of sampling times by:

identifying a second scan mode criterion for the second sample;

if the second scan mode criterion is equal to the first value, automatically converting the signal level to a second digital value resulting in the second sample at the second sampling time, wherein the second sampling time is equal to a predetermined time after the first sampling time;

if the second scan mode criterion is equal to the second value, converting the signal level to the second digital value in response to a second timing trigger signal corresponding to the second sampling time; and

storing the second digital value in memory, wherein the second digital value is associated with the second sample.

19. The method of claim 18 , wherein automatically converting the signal level to the second digital value comprises generating a sampling trigger signal for an analog-to-digital converter at the predetermined time after the first sampling time if the first scan mode criterion is equal to the first value, wherein the analog-to-digital converter converts the signal level to the second digital value in response to the sampling trigger signal.

20. The method of claim 17 , wherein sampling the signal level further comprises:

generating a plurality of timing trigger signals based on the plurality of sampling times; and

converting the signal level to the first digital value in response to a first timing trigger signal of the plurality of timing trigger signals when the first scan mode criterion is equal to the second value, the first timing trigger signal corresponding to the first sampling time.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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From: NXP B.V.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
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From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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