Information processing device
View Patent ↗An information processing device having a function for efficiently debugging a parallel processing program by controlling snoop operation is provided. The information processing device is so configured that the following is implemented: the setting for receiving a snoop request from a central processing unit can be set at a snoop controller that controls snoop operation; and as the result of reception of a snoop request, a debug controller can stop multiple central processing units.
1. An information processing device comprising:
a first processing unit;
a second processing unit;
a debug controller having a break condition register on which a break condition is set; and
a snoop controller having a snoop mask register on which a mask condition is set,
wherein the debug controller monitors a program executed by the first processing unit and causes the first processing unit to stop execution of the program when a state of the program matches the break condition,
wherein when a snoop request from the first processing unit to the snoop controller matches the mask condition, the snoop controller does not receive a snoop request from the second processing unit, and
wherein when a snoop request from the first processing unit to the snoop controller matches the mask condition, the debug controller causes the first processing unit to stop execution of a program.
2. The information processing device according to claim 1 ,
wherein when the state of the program matches the break condition, the debug controller causes the second processing unit to stop execution of a program.
3. The information processing device according to claim 1 ,
wherein at least one of a value of a program counter and write data is set as the break condition.
4. The information processing device according to claim 1 ,
wherein at least one of a command, an address, and write data contained in the snoop request is set as the mask condition.
5. An information processing device comprising:
a first processing unit;
a second processing unit;
a debug controller having a break condition register on which a break condition is set; and
a snoop controller having a snoop mask register on which a mask condition is set,
wherein the debug controller monitors a program executed by the first processing unit and causes the first processing unit to stop execution of the program when a state of the program matches the break condition,
wherein when a snoop request from the first processing unit to the snoop controller matches the mask condition, the snoop controller does not receive a snoop request from the second processing unit, and
wherein when a snoop request from the first processing unit to the snoop controller matches the mask condition, the debug controller causes the second processing unit to stop execution of a program.
6. An information processing device comprising:
a plurality of processing units;
a debug controller having a break condition register on which a break condition is set; and
a snoop controller having a snoop mask register on which a mask condition is set,
wherein the debug controller monitors a program executed by the processing units and causes a first processing unit to stop execution of the program when a state of a program executed by the first processing unit, which is one of the processing units, matches the break condition,
wherein when a snoop request from the first processing unit to the snoop controller matches the mask condition, the snoop controller does not receive a snoop request from processing units other than the first processing unit, and
wherein when the snoop request from the first processing unit to the snoop controller matches the mask condition, the debug controller causes said one or more processing units other than the first processing unit to stop execution of a program.
7. The information processing device according to claim 6 ,
wherein when the state of the program executed by the first processing unit matches the break condition, the debug controller causes one or more processing units other than the first processing unit to stop execution of a program.
8. The information processing device according to claim 6 ,
wherein at least one of a command, an address, and write data contained in the snoop request is set as the mask condition.
9. A debug method comprising the steps of:
causing a debug controller to monitor a program executed by a first processing unit, and when a state of the program matches a break condition set on a break condition register in the debug controller, causing the first processing unit to stop execution of the program;
preventing a snoop controller from receiving a snoop request from a second processing unit when a snoop request from the first processing unit to the snoop controller matches a mask condition set on a snoop mask register in the snoop controller; and
stopping, by the debug controller, execution of a program of the first processing unit when a snoop request from the first processing unit to the snoop controller matches the mask condition.
10. The debug method according to claim 9 , further comprising:
stopping, by the debug controller, execution of a program of the second processing unit when a state of the program matches the break condition.
11. The debug method according to claim 9 ,
wherein at least one of a value of a program counter and write data is set as the break condition.
12. The debug method according to claim 9 ,
wherein at least one of a command, an address, and write data contained in the snoop request is set as the mask condition.
13. A debug method comprising the steps of:
causing a debug controller to monitor a program executed by a first processing unit, and when a state of the program matches a break condition set on a break condition register in the debug controller, causing the first processing unit to stop execution of the program;
preventing a snoop controller from receiving a snoop request from a second processing unit when a snoop request from the first processing unit to the snoop controller matches a mask condition set on a snoop mask register in the snoop controller; and
stopping, by the debug controller, execution of a program of the second processing unit when a snoop request from the first processing unit to the snoop controller matches the mask condition.