Double self-aligned metal oxide TFT
A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
1. A method of fabricating metal oxide TFTs on transparent substrates comprising the steps of:
providing a transparent substrate having a front surface and a rear surface;
positioning opaque gate metal on the front surface of the substrate to define a gate area for a TFT;
depositing a layer of transparent gate dielectric on the front surface of the substrate overlying the gate metal and a surrounding area and a layer of transparent metal oxide semiconductor material on the surface of the layer of transparent gate dielectric;
depositing a layer of passivation material on the layer of metal oxide semiconductor material;
exposing portions of the layer of passivation material from the rear surface of the substrate and removing exposed portions of the layer of passivation material to leave a passivation area defining a channel area for the TFT overlying the gate area; and
depositing conductive material on the layer of metal oxide semiconductor material to form source and drain areas on opposed sides of the channel area using the opaque gate metal as a mask from the rear surface of the substrate.
2. A method as claimed in claim 1 wherein the step of depositing a layer of passivation material includes depositing and processing a positive working photoresist layer.
3. A method as claimed in claim 2 wherein the step of depositing the passivation layer includes depositing and processing a patternable material as the layer of passivation material.
4. A method as claimed in claim 1 wherein the step of depositing conductive material includes using one of a subtractive process and an additive process.
5. A method as claimed in claim 4 wherein the step of depositing conductive material using the subtractive process includes depositing a layer of transparent conductive material.
6. A method as claimed in claim 5 wherein the step of depositing a layer of transparent conductive material includes depositing one of a transparent conductive metal oxide, a transparent layer of thin metal, and a transparent organic layer.
7. A method as claimed in claim 5 wherein the step of depositing conductive material using the subtractive process includes depositing a coating of negative working photoresist on the surface of the layer of transparent conductive material.
8. A method as claimed in claim 4 wherein the step of depositing conductive material using the additive process includes one of selectively depositing one of Pt, Pd, and Au and a process including depositing conductive nanoparticles embedded in negative working photo polymer matrix and exposing and developing the negative working photo polymer matrix.
9. A method of fabricating metal oxide TFTs on transparent substrates comprising the steps of:
providing a transparent substrate having a front surface and a rear surface;
positioning opaque gate metal on the front surface of the substrate to define a gate area for a TFT;
depositing a layer of transparent gate dielectric on the front surface of the substrate overlying the gate metal and a surrounding area and a layer of transparent metal oxide semiconductor material on the surface of the layer of transparent gate dielectric;
depositing a layer of transparent passivation material on the layer of metal oxide semiconductor material;
depositing a layer of first photoresist over the layer of passivation material overlying the gate metal and the surrounding area;
exposing portions of the layer of first photoresist from the rear surface of the substrate and developing the layer of first photoresist to remove exposed portions of the layer of first photoresist to form a second etch mask;
removing portions of the layer of passivation material to leave a passivation area defining a channel area for the TFT overlying the gate area using the second etch mask from the rear surface of the substrate, and removing the second etch mask; and
depositing conductive material over the layer of transparent metal oxide semiconductor material and processing the conductive material to provide source and drain areas on opposed sides of the channel area.
10. A method as claimed in claim 9 wherein the layer of first photoresist is positive photoresist.
11. A method as claimed in claim 10 wherein the step of exposing portions of the layer of first photoresist includes using the opaque gate metal as a first self-alignment mask.
12. A method as claimed in claim 9 wherein the step of depositing a layer of transparent passivation material includes one of spin coating, spray coating, and slot coating, one of polymer PMG1, spin on glass, thermal evaporation of MgF 2 , TaO, and SiO 2 .
13. A method as claimed in claim 9 wherein the step of depositing the layer of transparent metal oxide semiconductor material includes depositing one of ZnO, InO, AlZnO, ZnInO, InAlZnO, InGaZnO, ZnSnO, GaSnO, InGaCuO, InCuO, and AlCuO.
14. A method as claimed in claim 9 wherein the step of removing portions of the layer of passivation material includes etching the layer of passivation material.
15. A method as claimed in claim 9 wherein the step of depositing conductive material includes using one of a subtractive process and an additive process.
16. A method as claimed in claim 15 wherein the step of depositing conductive material using the subtractive process includes depositing a layer of transparent conductive material.
17. A method as claimed in claim 16 wherein the step of depositing a layer of transparent conductive material includes depositing one of a transparent conductive metal oxide, a transparent layer of thin metal, and a transparent organic layer.
18. A method as claimed in claim 16 wherein the step of depositing conductive material using the subtractive process includes depositing a coating of negative working photoresist on the surface of the layer of transparent conductive material.
19. A method as claimed in claim 15 wherein the step of depositing conductive material using the additive process includes one of selectively depositing one of Pt, Pd, and Au and a process including depositing conductive nanoparticles embedded in negative working photo polymer matrix and exposing and developing the negative working photo polymer matrix.
20. A method of fabricating metal oxide TFTs on transparent substrates comprising the steps of:
providing a transparent substrate having a front surface and a rear surface;
positioning opaque gate metal on the front surface of the substrate to define a gate area for a TFT;
depositing a layer of transparent gate dielectric on the front surface of the substrate overlying the gate metal and a surrounding area and a layer of transparent metal oxide semiconductor material on the surface of the layer of transparent gate dielectric overlying the gate metal and the surrounding area;
depositing a layer of transparent passivation material on the layer of metal oxide semiconductor material overlying the gate metal and the surrounding area;
depositing a layer of positive photoresist over the layer of transparent passivation material overlying the gate metal and the surrounding area;
exposing portions of the layer of positive photoresist from the rear surface of the substrate using the opaque gate metal as a first self-alignment mask and developing the layer of positive photoresist to remove exposed portions of the layer of positive photoresist to form an etch mask;
etching the layer of passivation material to leave a passivation area defining a channel area for the TFT overlying the gate area, and removing the etch mask;
depositing a layer of transparent conductive material over the passivation area and exposed portions of the layer of transparent metal oxide semiconductor material;
depositing a layer of negative photoresist over the layer of transparent conductive material overlying the gate metal and the surrounding area;
exposing portions of the layer of negative photoresist from the rear surface of the substrate using the opaque gate metal as a second self-alignment mask and developing the layer of negative photoresist to remove unexposed portions of the layer of negative photoresist to form an etch mask; and
etching the layer of transparent conductive material to leave source and drain areas on opposed sides of the channel area.
21. A method as claimed in claim 20 wherein the step of depositing a layer of transparent passivation material includes one of spin coating, spray coating, and slot coating, one of polymer PMG1, spin on glass, and thermal evaporation of MgF 2 , TaO, or SiO 2 .
22. A method as claimed in claim 20 wherein the step of removing portions of the layer of transparent conductive material includes etching the layer of transparent conductive material.
23. A method as claimed in claim 20 wherein the step of depositing transparent conductive material includes depositing one of a transparent conductive metal oxide, a transparent layer of thin metal, and a transparent organic layer.