IP Library › Granted Patent US 8,124,972
Granted Patent B2
US 8,124,972 · App. 12/429,486 · Granted Feb 28, 2012

Thin film transistor

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,124,972
App. No.
12/429,486
Granted
Feb 28, 2012
Kind
B2
Abstract

The thin film transistor includes a gate insulating layer covering a gate electrode, over a substrate having an insulating surface; a semiconductor layer forming a channel formation region, in which a plurality of crystal regions is included in an amorphous structure; an impurity semiconductor layer imparting one conductivity type which forms a source region and a drain region; and a buffer layer formed from an amorphous semiconductor, which is located between the semiconductor layer and the impurity semiconductor layer. The thin film transistor includes the crystal region which includes minute crystal grains and inverted conical or inverted pyramidal grain each of which grows approximately radially from a position away from an interface between the gate insulating layer and the semiconductor layer toward a direction in which the semiconductor layer is deposited in a region which does not reach the impurity semiconductor layer.

Claims (54)

1. A thin film transistor comprising:

a gate electrode over a substrate having an insulating surface;

a gate insulating layer over the substrate, the gate insulating layer covering the gate electrode;

a first semiconductor layer over and in contact with the gate insulating layer, the first semiconductor layer including a plurality of crystal regions included in an amorphous structure;

at least two second semiconductor layers for forming a source region and a drain region, the at least two second semiconductor layers including an impurity element imparting one conductivity type; and

a buffer layer formed using an amorphous semiconductor between the first semiconductor layer and the at least two second semiconductor layers,

wherein the plurality of the crystal regions includes an inverted conical or inverted pyramidal crystal grain which grows substantially radially in a direction in which the first semiconductor layer is deposited, from a position away from an interface between the gate insulating layer and the first semiconductor layer, and

wherein the first semiconductor layer includes a crystal grain with a size of greater than or equal to 1 nm and less than or equal to 5 nm.

2. The thin film transistor according to claim 1 , wherein the first semiconductor layer has an NH group.

3. The thin film transistor according to claim 1 , wherein a nitrogen concentration of the first semiconductor layer, which is measured by secondary ion mass spectrometry, is 1×10 20 cm −3 to 1×10 21 cm −3 .

4. The thin film transistor according to claim 1 , wherein a nitrogen concentration of a portion of the first semiconductor layer, which is measured by secondary ion mass spectrometry, is 3×10 20 cm −3 to 1×10 21 cm −3 ,

wherein the portion is in a vicinity of the interface between the gate insulating layer and the first semiconductor layer, and

wherein the nitrogen concentration is reduced in a thickness direction of the first semiconductor layer from the vicinity of the interface.

5. The thin film transistor according to claim 1 , wherein a peak region of a spectrum of the first semiconductor layer, which is measured by low-temperature photoluminescence spectroscopy, is greater than or equal to 1.31 eV and less than or equal to 1.39 eV.

6. The thin film transistor according to claim 1 , wherein an oxygen concentration of the first semiconductor layer, which is measured by secondary ion mass spectrometry, is less than or equal to 5×10 18 cm −3 .

7. The thin film transistor according to claim 1 , wherein each of the plurality of crystal regions is a single crystal.

8. The thin film transistor according to claim 1 , wherein the plurality of the crystal regions includes a twin crystal.

9. A thin film transistor comprising:

a gate electrode over a substrate having an insulating surface;

a gate insulating layer over the substrate, the gate insulating layer covering the gate electrode;

a first semiconductor layer over and in contact with the gate insulating layer, the first semiconductor layer including a plurality of crystal regions included in an amorphous structure;

a second semiconductor layer having an amorphous structure over the first semiconductor layer; and

at least two third semiconductor layers for forming a source region and a drain region, the at least two third semiconductor layers including an impurity element imparting one conductivity type,

wherein the plurality of the crystal regions includes an inverted conical or inverted pyramidal crystal grain which grows substantially radially in a direction to the second semiconductor layer from a position away from an interface between the gate insulating layer and the first semiconductor layer, and

wherein the first semiconductor layer includes a crystal grain with a size of greater than or equal to 1 nm and less than or equal to 5 nm.

10. The thin film transistor according to claim 9 , wherein the first semiconductor layer has an NH group.

11. The thin film transistor according to claim 9 , wherein an oxygen concentration of the first semiconductor layer measured by secondary ion mass spectrometry is less than or equal to 5×10 18 cm −3 , and

wherein a nitrogen concentration of the first semiconductor layer measured by secondary ion mass spectrometry is 1×10 19 cm −3 to 1×10 21 cm −3 .

12. The thin film transistor according to claim 9 , wherein a nitrogen concentration of a portion of the first semiconductor layer, which is measured by secondary ion mass spectrometry, is 3×10 20 cm −3 to 1×10 21 cm −3 ,

wherein the portion is in a vicinity of the interface between the gate insulating layer and the first semiconductor layer, and

wherein the nitrogen concentration is reduced in a thickness direction of the first semiconductor layer from the vicinity of the interface.

13. The thin film transistor according to claim 9 , wherein a peak region of a spectrum of the first semiconductor layer, which is measured by low-temperature photoluminescence spectroscopy, is greater than or equal to 1.31 eV and less than or equal to 1.39 eV.

14. The thin film transistor according to claim 9 , wherein an oxygen concentration of the first semiconductor layer, which is measured by secondary ion mass spectrometry, is less than or equal to 5×10 18 cm −3 .

15. The thin film transistor according to claim 9 , wherein each of the plurality of the crystal regions is a single crystal.

16. The thin film transistor according to claim 9 , wherein the plurality of the crystal regions includes a twin crystal.

17. A thin film transistor comprising:

a gate electrode over a substrate having an insulating surface;

a gate insulating layer over the gate electrode;

a first semiconductor layer over and in contact with the gate insulating layer, the first semiconductor layer including a plurality of crystal regions included in an amorphous structure;

a second semiconductor layer having an amorphous structure over the first semiconductor layer; and

a source region and a drain region over the second semiconductor layer,

wherein the source region and the drain region include an impurity element imparting one conductivity type,

wherein the plurality of the crystal regions includes an inverted conical or inverted pyramidal crystal grain, in which a vertex of the inverted conical or the inverted pyramidal crystal grain is closer to an interface between the gate insulating layer and the first semiconductor layer than the second semiconductor layer, and

wherein the first semiconductor layer includes a crystal grain with a size of greater than or equal to 1 nm and less than or equal to 5 nm.

18. The thin film transistor according to claim 17 , wherein the first semiconductor layer has an NH group.

19. The thin film transistor according to claim 17 , wherein an oxygen concentration of the first semiconductor layer measured by secondary ion mass spectrometry is less than or equal to 5×10 18 cm −3 , and

wherein a nitrogen concentration of the first semiconductor layer measured by secondary ion mass spectrometry is 1×10 19 cm −3 to 1×10 21 cm −3 .

20. The thin film transistor according to claim 17 , wherein a nitrogen concentration of a portion of the first semiconductor layer, which is measured by secondary ion mass spectrometry, is 3×10 20 cm −3 to 1×10 21 cm −3 ,

wherein the portion is in a vicinity of the interface between the gate insulating layer and the first semiconductor layer, and

wherein the nitrogen concentration is reduced in a thickness direction of the first semiconductor layer from the vicinity of the interface.

21. The thin film transistor according to claim 17 , wherein a peak region of a spectrum of the first semiconductor layer, which is measured by low-temperature photoluminescence spectroscopy, is greater than or equal to 1.31 eV and less than or equal to 1.39 eV.

22. The thin film transistor according to claim 17 , wherein an oxygen concentration of the first semiconductor layer, which is measured by secondary ion mass spectrometry, is less than or equal to 5×10 18 cm −3 .

23. The thin film transistor according to claim 17 , wherein each of the plurality of the crystal regions is a single crystal.

24. The thin film transistor according to claim 17 , wherein the plurality of the crystal regions includes a twin crystal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2009
From: DAIRIKI, KOJI; MIYAIRI, HIDEKAZU; ISA, TOSHIYUKI; MIYANAGA, AKIHARU; HIROHASHI, TAKUYA; YAMAZAKI, SHUNPEI; WATABE, TAKEYOSHI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 022770/0883 →
Priority Claims (2)
JP 2008-116054 · Apr 25, 2008 · national
JP 2008-294074 · Nov 18, 2008 · national
Continuity (1)
Related Publication 20090267068A1 · Oct 29, 2009