IP Library Granted Patent US 7,993,978
Granted Patent B2
US 7,993,978 · App. 12/453,338 · Granted Aug 9, 2011

Method of manufacturing a semiconductor device and molding die

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Quick Facts
Patent No.
US 7,993,978
App. No.
12/453,338
Granted
Aug 9, 2011
Kind
B2
Abstract

A method of manufacturing a semiconductor device capable of obtaining high joining force between a heat spreader and resin is provided. The method of manufacturing a semiconductor device according to the present invention includes: setting a heat spreader 60 on a face formed a plurality of apertures 22 in a cavity 21 of a first molding die 14 ; filling resin 20 into the cavity; setting a substrate 54 mounted with a semiconductor chip 50 a second molding die 12 ; and pressure-welding the first molding die 14 and the second molding die 12 so that the semiconductor chip is embedded in the resin 20 , wherein a plurality of concave portion is formed on one face of the heat spreader 60 , a plurality of convex portions is formed on the other face of the heat spreader 60 , and the plurality of concave portions and the plurality of convex portions are overlapped in plan view.

Claims (26)

1. A method of manufacturing a semiconductor device, said method comprising:

setting a heat spreader, that comprises a plurality of apertures, on a face thereof in a cavity of a first die;

filling resin into the cavity;

setting a substrate mounted with a semiconductor chip in a second die; and

pressure-welding the first die and the second die so that the semiconductor chip is embedded in the resin,

wherein a plurality of concave portions is formed on a side of the heat spreader that faces the semiconductor chip, a plurality of convex portions is formed on another side of the heat spreader, and the plurality of concave portions and the plurality of convex portions are overlapped in a plan view.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein a plurality of semiconductor chips is mounted on the substrate, and a pitch between the apertures of the first die is smaller than a unit package size including the substrate and the semiconductor chip.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein at least a part of the plurality of apertures comprises through-holes.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the pressure welding is performed in a state wherein the apertures, through-holes are suctioned from outside of the cavity.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein a surface of the heat spreader is contacted with the resin.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein said another side of the heat spreader opposes said side of the heat spreader.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein said another side of the heat spreader is exposed.

8. The method of manufacturing a semiconductor device according to claim 1 , wherein the apertures comprise a taper whose diameter increases in a direction from said another side of the heat spreader to said side of the heat spreader.

9. A die for resin-sealing a substrate on which a semiconductor chip is mounted, the die comprising:

a first die having a cavity for filling a resin and a second die for setting the substrate,

wherein the first die comprises a plurality of apertures on a face thereof on which a planar heat spreader is set, and

wherein the apertures comprise a taper whose diameter increases towards the cavity.

10. The die according to claim 9 , wherein a plurality of semiconductor chips is mounted on the substrate, and a pitch between the apertures of the first die is smaller than a unit package size including the substrate and the semiconductor chip.

11. The die according to claim 9 , wherein the apertures are uniformly dispersion-formed on an opposing face that opposes the semiconductor chip among an inner face of the cavity of the second die.

12. The die according to claim 10 , wherein three or more apertures per unit package size are respectively dispersion-formed on the opposing face in directions intersecting each other.

13. The die according to claim 9 , wherein at least a part of the plurality of apertures comprises through-holes.

14. The die according to claim 13 , wherein at least other apertures among the plurality of apertures are not through-holes.

15. The melding die according to claim 13 , wherein a pitch (P) between adjacent apertures among the plurality of apertures is 1.1 times a diameter (φ) of the apertures or greater.

16. The die according to claim 9 , wherein a top surface of the heat spreader that faces the semiconductor chip comprises a plurality of concave portions.

17. The die according to claim 16 , wherein a bottom surface of the heat spreader comprises a plurality of convex portions, the plurality of concave portions and the plurality of convex portions overlapping in a plan view.

18. The die according to claim 16 , wherein a bottom surface of the heat spreader, which opposes the top surface the heat spreader, is exposed.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0174 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2009
From: SATO, YUKO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022691/0256 →