IP Library Granted Patent US 9,208,037
Granted Patent B2
US 9,208,037 · App. 12/457,682 · Granted Dec 8, 2015

Duplexed operation processor control system, and duplexed operation processor control method

Inventors: Toshiki Shimizu (Hitachi, JP); Akira Bando (Hitachi, JP); Yusaku Otsuka (Hitachiota, JP); Yasuhiro Kiyofuji (Hitachi, JP); Eiji Kobayashi (Hitachinaka, JP); Akihiro Onozuka (Hitachi, JP); Satoru Funaki (Hitachi, JP); Masakazu Ishikawa (Hitachi, JP); Hideaki Masuko (Hitachi, JP); Yusuke Seki (Hitachi, JP); Wataru Sasaki (Hitachiota, JP); Naoya Mashiko (Hitachiota, JP); Akihiro Nakano (Iwaki, JP); Shin Kokura (Hitachi, JP); Shoichi Ozawa (Hitachi, JP); Yu Iwasaki (Hitachi, JP)
Assignees: HITACHI, LTD.; HITACHI INDUSTRY & CONTROL SOLUTIONS, LTD.
G06F11/2033G06F8/67G06F11/1658G06F11/2028G06F11/2038G06F11/2097
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Quick Facts
Patent No.
US 9,208,037
App. No.
12/457,682
Granted
Dec 8, 2015
Kind
B2
Abstract

The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.

Claims (17)

1. A duplexed operation processor control system, comprising:

a pair of operation processors, an I/O device coupled to a control target, a first communication path that couples the operation processors to the I/O device, and a second communication path that couples the operation processors with each other, and

wherein one of the operation processors is a primary operation processor which is in an active state for executing control operations for the control target and the other of the operation processors is a secondary operation processor which is in a standby state,

wherein each of the operation processors is capable of switching between operating as the primary operation processor and the secondary operation processor,

wherein each time data is transmitted between the primary operation processor and the control target via the first communication path, the secondary operation processor acquires the data contemporaneously with the transmission via a branched signal line that connects the I/O device to both the primary and secondary operation processors and performs a same operation as an operation performed by the primary operation processor based on the acquired data,

wherein a phase of a second control cycle time of the secondary operation processor is advanced relative to a phase of a first control cycle time of the primary operation processor, and

wherein the secondary operation processor is triggered to start the second control cycle time thereof, in response to a synchronous request frame sent from the primary operation processor to the secondary operation processor, and the primary operation processor is triggered to start the first control cycle time thereof, in response to a synchronous acknowledge frame output from the secondary operation processor to the primary operation processor as a response to the synchronous request frame.

2. The duplexed operation processor control system as claimed in claim 1 , wherein the switching over operation of the operation processors between primary and secondary is carried out if a trouble is detected in a self-diagnosis executed by the primary operation processor, or if the secondary operation processor determines that sending of frames to be periodically output from the primary operation processor to the secondary operation processor in a normal state is stopped.

3. The duplexed operation processor control system as claimed in claim 1 , wherein, a program updating is carried out in the secondary operation processor prior to the switching over operation of the operation processors, and, the switching over operation of the operation processors is executed after the secondary operation processor determines that the secondary operation processor operates normally based on the updated program by using the data that has been acquired by the secondary operation processor.

4. A duplexed operation processor control method for a duplexed operation processor control system comprising a pair of operation processors, an I/O device coupled to a control target, a first communication path that couples the operation processors to the I/O device, and a second communication path that couples the operation processors with each other, the method comprising:

configuring one of the operation processors to be a primary operation processor which is in an active state for executing control operations for the control target and the other of the operation processors to be a secondary operation processor which is in a standby state such that each of the operation processors is capable of switching between operating as the primary operation processor and the secondary operation processor, where a phase of a second control cycle time of the secondary operation processor is advanced relative to a phase of a first control cycle time of the primary operation processor;

directing, each time data is transmitted between the primary operation processor and the control target via the first communication path, the secondary operation processor to acquire the data contemporaneously with the transmission via a branched signal line that connects the I/O device to both the primary and secondary operation processors and to perform a same operation as an operation performed by the primary operation processor based on the acquired data; and

triggering the secondary operation processor to start the second control cycle time thereof, in response to a synchronous request frame sent from the primary operation processor to the secondary operation processor, and triggering the primary operation processor to start the first control cycle time thereof, in response to a synchronous acknowledge frame output from the secondary operation processor to the primary operation processor as a response to the synchronous request frame.

5. The duplexed operation processor control system as claimed in claim 4 , wherein the step of switching over the operation processors between primary and secondary is carried out if a trouble is detected in a self-diagnosis executed by the primary operation processor, or if the secondary operation processor determines that sending of frames to be periodically output from the primary operation processor to the secondary operation processor in a normal state is stopped.

6. The duplexed operation processor control method as claimed in claim 4 , wherein, a program updating is carried out in the secondary operation processor prior to the switching over operation of the operation processors, and the step of switching over the processors is executed after the secondary operation processor determines that the secondary operation processor operates normally based on the updated program by using the data that has been acquired by the secondary operation processor.

7. The duplexed operation processor control method as claimed in claim 4 , further comprising:

allowing the secondary operation processor to acquire control data transmitted to the primary operation processor via the branched signal contemporaneously with the control data being transmitted to the primary operation processor from the control target along the first communication path.

Assignments (3)
MERGER Recorded Aug 3, 2015
From: HITACHI INFORMATION & CONTROL SOLUTIONS, LTD.
To: HITACHI INDUSTRY & CONTROL SOLUTIONS, LTD.
Reel/Frame 036238/0272 →
CORRECTIVE ASSIGNMENT TO ADD THE SECOND OMITTED ASSIGNEE PREVIOUSLY RECORDED ON REEL 022895, FRAME 0859-0861 Recorded Oct 19, 2009
From: SHIMIZU, TOSHIKI; BANDO, AKIRA; OTSUKA, YUSAKU; KIYOFUJI, YASUHIRO; KOBAYASHI, EIJI; ONOZUKA, AKIHIRO; FUNAKI, SATORU; ISHIKAWA, MASAKAZU; MASUKO, HIDEAKI; SEKI, YUSUKE; SASAKI, WATARU; MASHIKO, NAOYA; NAKANO, AKIHIRO; KOKURA, SHIN; OZAWA, SHOICHI; IWASAKI, YU
To: HITACHI, LTD.; HITACHI INFORMATION & CONTROL SOLUTIONS, LTD.
Reel/Frame 023413/0337 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2009
From: SHIMIZU, TOSHIKI; BANDO, AKIRA; OTSUKA, YUSAKU; KIYOFUJI, YASUHIRO; KOBAYASHI, EIJI; ONOZUKA, AKIHIRO; FUNAKI, SATORU; ISHIKAWA, MASAKAZU; MASUKO, HIDEAKI; SEKI, YUSUKE; SASAKI, WATARU; MASHIKO, NAOYA; NAKANO, AKIHIRO; KOKURA, SHIN; OZAWA, SHOICHI; IWASAKI, YU
To: HITACHI, LTD.
Reel/Frame 022895/0859 →
Priority Claims (1)
JP 2008-160877 · Jun 19, 2008 · national
Continuity (1)
Related Publication 20090319756A1 · Dec 24, 2009