Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device including implanting an impurity ion into a predetermined region of a semiconductor layer using a resist film as a mask, wherein in case when a mask data ratio for implanting the impurity ion only into the predetermined region in the resist film is less than a first reference value, a dummy ion implantation region, into which the impurity ion is also implanted in addition to the predetermined region, is added in a region other than the predetermined region so that a mask data ratio becomes larger than a second reference value which is equal to or larger than the first reference value, the mask data ratio indicating a ratio of an opening with respect to an entire region of a reticle region corresponding to the reticle.
1 . A method of manufacturing a semiconductor device comprising implanting an impurity ion into a predetermined region of a semiconductor layer using a resist film as a mask,
wherein in case when a mask data ratio for implanting said impurity ion only into said predetermined region in said resist film is less than a first reference value, a dummy ion implantation region, into which said impurity ion is also implanted in addition to said predetermined region, is added in a region other than said predetermined region so that a mask data ratio becomes larger than a second reference value which is equal to or larger than said first reference value, said mask data ratio indicating a ratio of an opening with respect to an entire region of a reticle region corresponding to the reticle.
2 . The method according to claim 1 ,
wherein said dummy ion implantation region includes a plurality of regions which are disposed to be distributed.
3 . The method according to claim 1 ,
wherein a plurality of chip formation regions that are divided by a scribe line region are provided in said semiconductor layer, and
said dummy ion implantation region is provided on said scribe line region.
4 . The method according to claim 1 ,
wherein said first reference value is 0.1%.
5 . The method according to claim 1 ,
wherein said second reference value is 1%.
6 . The method according to claim 1 ,
wherein said first reference value and said second reference value each is 1%.
7 . The method according to claim 1 ,
wherein, in said implanting the impurity ion, said impurity ion is implanted into a polysilicon layer formed on a substrate so as to form a polysilicon resistive element.