Booster circuit, display panel driver, and display device
A booster circuit is provided with a boosting section and a control circuitry. The boosting section includes a boosting capacitor element and is configured to perform charging operation to accumulate charges across the boosting capacitor element and to perform boosting operation to boost an output voltage by using charges accumulated in the boosting capacitor element. The control circuitry controls the boosting section to alternately perform the charging and boosting operations in response to a boosting clock signal and the output voltage. The control circuitry prohibits performing the charging and boosting operations in response to whether a selected line of dot pixels is an odd-numbered line or an even-numbered line in a display panel.
1 . A booster circuit comprising:
A boosting section including a boosting capacitor element, said boosting section configured to perform charging operation to accumulate charges across said boosting capacitor element and to perform boosting operation to boost an output voltage by using charges accumulated in said boosting capacitor element; and
a control circuitry controlling said boosting section to alternately perform said charging and boosting operations in response to a boosting clock signal and said output voltage,
wherein said control circuitry prohibits performing said charging and boosting operations in response to whether a selected line of dot pixels is an odd-numbered line or an even-numbered line in a display panel.
2 . The booster circuit according to claim 1 ,
wherein said control circuitry allows said charging and boosting operations for an even-numbered image frame when said selected line is one of odd-numbered and even-numbered lines, and
wherein said control circuitry allows said charging and boosting operations for an odd-numbered image frame adjacent to said even-numbered image frame when said selected line is the other of said odd-numbered and even-numbered lines.
3 . The booster circuit according to claim 2 ,
wherein said control circuitry receives a horizontal synchronization signal indicative of a beginning of each horizontal period and
wherein said control circuitry prohibits performing said charging and boosting operations in response to said horizontal synchronization signal.
4 . The booster circuit according to claim 3 ,
wherein said control circuitry receives a frame switch signal indicative of switching of image frames, and
wherein said control circuitry prohibits performing said charging and boosting operations in response to said frame switch signal.
5 . The booster circuit according to claim 1 ,
wherein said boosting controller section controls said booster section to perform said charging operation in response to said boosting clock signal being set to one of activated and deactivated states, and
wherein said boosting controller section controls said booster section to perform said boosting operation in response to said boosting clock signal being set to the other of said activated and deactivated states.
6 . A driver comprising:
a booster circuit outputting a boosted output voltage;
a grayscale voltage generator operating on said boosted output voltage to generate a set of grayscale voltages;
a digital-analog converter selecting output grayscale voltages corresponding to display data from said set of grayscale voltages; and
an amplifier circuit operating on said boosted output voltage to output said selected output grayscale voltages to a display panel,
wherein said booster circuit includes:
a boosting section comprising a boosting capacitor element, said boosting section configured to perform charging operation to accumulate charges across said boosting capacitor element and to perform boosting operation to boost said output voltage by using charges accumulated in said boosting capacitor element; and
a control circuitry controlling said boosting section to alternately perform said charging and boosting operations in response to a boosting clock signal and said output voltage,
wherein said control circuitry prohibits performing said charging and boosting operations in response to whether a selected line of dot pixels is an odd-numbered line or an even-numbered line in a display panel.
7 . The driver according to claim 6 , wherein said control circuitry allows said charging and boosting operations for an even-numbered image frame when said selected line is one of odd-numbered and even-numbered lines, and
wherein said control circuitry allows said charging and boosting operations for an odd-numbered image frame adjacent to said even-numbered image frame when said selected line is the other of said odd-numbered and even-numbered lines.
8 . The driver according to claim 7 , wherein said control circuitry receives a horizontal synchronization signal indicative of a beginning of each horizontal period and
wherein said control circuitry prohibits performing said charging and boosting operations in response to said horizontal synchronization signal.
9 . The driver according to claim 8 , wherein said control circuitry receives a frame switch signal indicative of switching of image frames, and
wherein said control circuitry prohibits performing said charging and boosting operations in response to said frame switch signal.
10 . The driver according to claim 6 , wherein said boosting controller section controls said booster section to perform said charging operation in response to said boosting clock signal being set to one of activated and deactivated states, and
wherein said boosting controller section controls said booster section to perform said boosting operation in response to said boosting clock signal being set to the other of said activated and deactivated states.
11 . A display device comprising:
a booster circuit outputting a boosted output voltage;
a driver; and
a display panel,
wherein said driver comprising:
a grayscale voltage generator operating on said boosted output voltage to generate a set of grayscale voltages;
a digital-analog converter selecting output grayscale voltages corresponding to display data from said set of grayscale voltages; and
an amplifier circuit operating on said boosted output voltage to output said selected output grayscale voltages to a display panel,
wherein said booster circuit includes:
a boosting section comprising a boosting capacitor element, said boosting section configured to perform charging operation to accumulate charges across said boosting capacitor element and to perform boosting operation to boost said output voltage by using charges accumulated in said boosting capacitor element; and
a control circuitry controlling said boosting section to alternately perform said charging and boosting operations in response to a boosting clock signal and said output voltage,
wherein said control circuitry prohibits performing said charging and boosting operations in response to whether a selected line of dot pixels is an odd-numbered line or an even-numbered line in a display panel.
12 . The display device according to claim 11 , wherein said control circuitry allows said charging and boosting operations for an even-numbered image frame when said selected line is one of odd-numbered and even-numbered lines, and
wherein said control circuitry allows said charging and boosting operations for an odd-numbered image frame adjacent to said even-numbered image frame when said selected line is the other of said odd-numbered and even-numbered lines.
13 . The display device according to claim 12 ,
wherein said control circuitry receives a horizontal synchronization signal indicative of a beginning of each horizontal period and
wherein said control circuitry prohibits performing said charging and boosting operations in response to said horizontal synchronization signal.
14 . The display device according to claim 13 ,
wherein said control circuitry receives a frame switch signal indicative of switching of image frames, and
wherein said control circuitry prohibits performing said charging and boosting operations in response to said frame switch signal.
15 . The display device according to claim 11 ,
wherein said boosting controller section controls said booster section to perform said charging operation in response to said boosting clock signal being set to one of activated and deactivated states, and
wherein said boosting controller section controls said booster section to perform said boosting operation in response to said boosting clock signal being set to the other of said activated and deactivated states.
16 . A method of voltage boosting, comprising:
alternately performing a charging operation to accumulate charges across a boosting capacitor element and a boosting operation to boost an output voltage by using charges accumulated in said boosting capacitor element in response to a boosting clock signal and said output voltage; and
prohibiting performing said charging and boosting operations in response to whether a selected line of dot pixels is an odd-numbered line or an even-numbered line in a display panel.
17 . The method according to claim 16 , further comprising:
allowing said charging and boosting operations for an even-numbered image frame when said selected line is one of odd-numbered and even-numbered lines; and
allowing said charging and boosting operations for an odd-numbered image frame adjacent to said even-numbered image frame when said selected line is the other of said odd-numbered and even-numbered lines.
18 . The method according to claim 17 , further comprising:
receiving a horizontal synchronization signal indicative of a beginning of each horizontal period,
wherein said charging and boosting operations are prohibited in response to said horizontal synchronization signal.
19 . The method according to claim 18 , further comprising:
receiving a frame switch signal indicative of switching of image frames,
wherein said charging and boosting operations are prohibited in response to said frame switch signal.
20 . The method according to claim 16 , wherein said charging operation is performed in response to said boosting clock signal being set to one of activated and deactivated states, and
wherein said boosting operation is performed in response to said boosting clock signal being set to the other of said activated and deactivated states.