IP Library Granted Patent US 7,964,477
Granted Patent B2
US 7,964,477 · App. 12/470,493 · Granted Jun 21, 2011

Method of manufacturing III nitride crystal, III nitride crystal substrate, and semiconductor device

Assignee: Sumitomo Electric Industries, Ltd.
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Quick Facts
Patent No.
US 7,964,477
App. No.
12/470,493
Granted
Jun 21, 2011
Kind
B2
Abstract

Affords III-nitride crystals having a major surface whose variance in crystallographic plane orientation with respect to an {hkil} plane chosen exclusive of the { 0001 } form is minimal. A method of manufacturing the III-nitride crystal is one of: conditioning a plurality of crystal plates ( 10 ) in which the deviation in crystallographic plane orientation in any given point on the major face ( 10 m ) of the crystal plates ( 10 ), with respect to an {hkil} plane chosen exclusive of the { 0001 } form, is not greater than 0.5°; arranging the plurality of crystal plates ( 10 ) in a manner such that the plane-orientation deviation, with respect to the {hkil} plane, in any given point on the major-face ( 10 m ) collective surface ( 10 a ) of the plurality of crystal plates ( 10 ) will be not greater than 0.5°, and such that at least a portion of the major face ( 10 m ) of the crystal plates ( 10 ) is exposed; and growing second III-nitride crystal ( 20 ) onto the exposed areas of the major faces ( 10 m ) of the plurality of crystal plates ( 10 ).

Claims (15)

1. A III-nitride crystal manufacturing method provided with:

a step of slicing a plurality of crystal plates from a first III-nitride crystal and conditioning the plurality of crystal plates to a deviation in crystallographic plane orientation in any given point on the major face of each crystal plate, with respect to an {hkil} plane being a crystallographic plane chosen exclusive of the { 0001 } form, of not greater than 0.5°;

a step of arranging the plurality of crystal plates in a manner such that the plane-orientation deviation, with respect to the {hkil} plane, in any given point on the major-face collective surface of the plurality of crystal plates is not greater than 0.5°, and such that at least a portion of the major face of each crystal plate is exposed; and

a step of growing second III-nitride crystal onto the exposed areas of the major faces of the plurality of crystal plates in such a way as to incorporate and unify first crystal regions that grow onto the exposed areas of the major faces of each crystal plate, and second crystal regions that are regions where the first crystal regions merge with each other.

2. A III-nitride crystal manufacturing method as set forth in claim 1 , wherein:

in said step of conditioning the plurality of crystal plates, the deviation in crystallographic plane orientation in any given point on the major face of each crystal plate, with respect to an {hkil} plane, is not greater than 0.2°; and

in the step of arranging the plurality of crystal plates, the plane-orientation deviation, with respect to the {hkil} plane, in any given point on the major-face collective surface of the plurality of crystal plates is not greater than 0.2°.

3. A method of manufacturing a III-nitride crystal substrate from second III-nitride crystal obtained by a manufacturing method as set forth in claim 1 , the III-nitride crystal substrate manufacturing method being provided with a step of forming on the second III-nitride crystal major surfaces perpendicular to the growth axis of the second III-nitride crystal.

4. A method of manufacturing a III-nitride crystal substrate from second III-nitride crystal obtained by a manufacturing method as set forth in claim 2 , the III-nitride crystal substrate manufacturing method being provided with a step of forming on the second III-nitride crystal major surfaces perpendicular to the growth axis of the second III-nitride crystal.

5. A method of manufacturing semiconductor devices incorporating a III-nitride crystal substrate obtained by a manufacturing method as set forth in claim 3 , the semiconductor device manufacturing method being provided with:

a step of preparing a III-nitride crystal substrate that includes the first crystal regions and the second crystal regions; and

a step of forming semiconductor devices with the III-nitride crystal substrate.

6. A method of manufacturing semiconductor devices incorporating a III-nitride crystal substrate obtained by a manufacturing method as set forth in claim 4 , the semiconductor device manufacturing method being provided with:

a step of preparing a III-nitride crystal substrate that includes the first crystal regions and the second crystal regions; and

a step of forming semiconductor devices with the III-nitride crystal substrate.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Dec 7, 2023
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUBISHI CHEMICAL CORPORATION
Reel/Frame 065799/0445 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2009
From: FUJIWARA, SHINSUKE
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 022723/0866 →
Priority Claims (1)
JP 2008-139585 · May 28, 2008 · national
Continuity (1)
Related Publication 20090298265A1 · Dec 3, 2009