IP Library Granted Patent US 8,216,900
Granted Patent B2
US 8,216,900 · App. 12/471,967 · Granted Jul 10, 2012

Nonvolatile memory device, method of manufacturing the nonvolatile memory device, and method of manufacturing flat panel display device provided with the nonvolatile memory device

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Quick Facts
Patent No.
US 8,216,900
App. No.
12/471,967
Granted
Jul 10, 2012
Kind
B2
Abstract

Provided are a nonvolatile memory device, a method of manufacturing the nonvolatile memory device, and a method of manufacturing a flat panel display device provided therein with the nonvolatile memory device. According to an embodiment, an amorphous silicon layer is formed on a substrate, and then annealed by using an Excimer laser to form a crystallized silicon layer. A nitrogen plasma treatment is performed for the crystallized silicon layer to planarize an upper surface of the crystallized silicon layer. An ONO layer is formed on the nitrogen plasma-treated crystallized silicon layer. A metal layer is formed on the ONO layer. The metal layer, the ONO layer and the nitrogen plasma-treated crystallized silicon layer are patterned.

Claims (29)

1. A method of manufacturing a nonvolatile memory device, the method comprising:

forming an amorphous silicon layer on a substrate;

annealing the amorphous silicon layer by using an Excimer laser to form a crystallized silicon layer;

performing a nitrogen plasma treatment for the crystallized silicon layer to planarize an upper surface of the crystallized silicon layer;

forming an ONO layer on the nitrogen plasma-treated crystallized silicon layer;

forming a metal layer on the ONO layer; and

patterning the metal layer, the ONO layer and the nitrogen plasma-treated crystallized silicon layer.

2. The method of claim 1 , prior to the forming of the amorphous silicon layer, further comprising forming a buffer layer on the substrate.

3. The method of claim 2 , wherein the forming of the buffer layer comprises:

forming a buffer silicon nitride layer on the substrate; and

forming a buffer silicon oxide layer on the buffer silicon nitride layer.

4. The method of claim 3 , wherein the buffer silicon nitride layer has a thickness range of 10-1000 Å, and the buffer silicon oxide layer has a thickness in the range of 10-1000 Å.

5. The method of claim 1 , wherein the nitrogen plasma treatment is performed under the conditions of 200 W to 1550 W RF energy, 100 sccm to 800 sccm nitrogen dose and 10 mtorr to 20 mtorr chamber pressure.

6. The method of claim 1 , wherein the amorphous silicon layer has a thickness in the range of 500-3000 Å.

7. The method of claim 1 , wherein performing the nitrogen plasma treatment forms a silicon nitride layer on the crystallized silicon layer.

8. The method of claim 1 , wherein performing the nitrogen plasma treatment forms a silicon nitride layer on the crystallized silicon layer, wherein the ONO layer is formed on the silicon nitride layer.

9. The method of claim 1 , wherein the amorphous silicon layer and the ONO layer are formed by using PECVD.

10. The method of claim 1 , wherein the substrate is a glass substrate.

11. A method of manufacturing a flat panel display device provided therein with a nonvolatile memory device, the method comprising:

forming a buffer layer on a glass substrate;

forming an amorphous silicon layer on the buffer layer;

annealing the amorphous silicon layer by using an Excimer laser to form a crystallized silicon layer;

performing a nitrogen plasma treatment for the crystallized silicon layer to planarize an upper surface of the crystallized silicon layer;

forming an ONO layer on the nitrogen plasma-treated crystallized silicon layer;

forming a metal layer on the ONO layer; and

patterning the metal layer, the ONO layer and the nitrogen plasma-treated crystallized silicon layer.

12. The method of claim 11 , wherein a silicon nitride layer is formed on the crystallized silicon layer by the nitrogen plasma treatment.

13. The method of claim 11 , wherein the nitrogen plasma treatment is performed under the conditions of 200 W to 1550 W RF energy, 100 sccm to 800 sccm nitrogen dose and 10 mtorr to 20 mtorr chamber pressure.

14. The method of claim 11 , wherein the amorphous silicon layer is formed at a low temperature equal to or less than 500° C. by using PECVD.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2017
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 041375/0124 →
CORRECTIVE ASSIGNMENT TO CORRECT REMOVE PATENT NO. 878209 FROM EXHIBIT B PREVIOUSLY RECORDED AT REEL: 034009 FRAME: 0157. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 24, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034087/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034009/0157 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2009
From: KIM, DAE YOUNG
To: DONGBU HITEK CO., LTD.
Reel/Frame 022766/0235 →