IP Library Granted Patent US 8,035,201
Granted Patent B2
US 8,035,201 · App. 12/473,232 · Granted Oct 11, 2011

Reliable interconnection

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Quick Facts
Patent No.
US 8,035,201
App. No.
12/473,232
Granted
Oct 11, 2011
Kind
B2
Abstract

Embodiments relate to a method for forming reliable interconnects by the use of a device layer that can serve as a barrier or an etch stop layer, among other applications. The device layer is UV resistant in that its dielectric constant and stress remain stable or relatively stable when subjected to UV curing.

Claims (29)

1. A method of forming a device comprising:

providing a substrate prepared with circuit components;

forming a doped device layer on the substrate;

forming an interlevel dielectric layer on the doped device layer; and

exposing the substrate with UV radiation to cure the interlevel dielectric layer, wherein properties of the doped device layer remain stable when exposed to UV radiation.

2. The method of claim 1 wherein the doped device layer comprises a low k dielectric layer.

3. The method of claim 1 wherein the doped device layer comprises a low k dielectric layer doped with —CH 3 .

4. The method of claim 1 wherein the doped device layer comprises (CH 3 ) n SiC x N y H z .

5. The method of claim 1 wherein the interlevel dielectric layer comprises an ultra low k (ULK) dielectric layer.

6. The method of claim 5 wherein the doped device layer comprises a low k dielectric layer.

7. The method of claim 5 wherein the doped device layer comprises (CH 3 ) n SiC x N y H z .

8. The method of claim 1 wherein the doped device layer comprises a k of ≦4.5.

9. The method of claim 8 wherein properties of the doped device layer that remain stable include dielectric constant of the low k dielectric layer.

10. The method of claim 8 wherein properties of the doped device layer that remain stable include dielectric constant and stress of the low k dielectric layer.

11. The method of claim 8 wherein properties of the doped device layer remain stable when exposed to UV radiation for 30-600 seconds.

12. The method of claim 1 wherein forming the doped device layer comprises supplying a dopant source comprising an alky precursor.

13. The method of claim 12 wherein forming the doped device layer further comprises reacting device layer precursors with the alky precursor, wherein the device layer precursors comprise (CH 3 ) 3 SiH or (CH 3 ) 4 Si and NH 3 .

14. The method of claim 12 wherein the dopant source comprises an alkyl precursor selected from H n C(CH 3 ) 4-n (n=0-4), H n (CH 3 ) 3-n C—H n′ (CH 3 ) 3-n′ (n=1-3, n′=1-3), or RC—CR′ alkyl.

15. The method of claim 14 wherein forming the doped device layer further comprises reacting device layer precursors with the alkyl precursor, wherein the device layer precursors comprise (CH 3 ) 3 SiH or (CH 3 ) 4 Si and NH 3 .

16. A method for forming a semiconductor device comprising:

providing a substrate;

forming a doped device layer on the substrate; and

exposing the substrate to UV radiation, wherein properties of the doped device layer are stable when exposed to the UV radiation.

17. The method of claim 16 wherein the doped device layer comprises (CH 3 ) n SiC x N y H z .

18. The method of claim 17 wherein a dopant source for forming the doped device layer comprises an alkyl precursor selected from H n C(CH 3 ) 4-n (n=0-4), H n (CH 3 ) 3-n C—H n′ (CH 3 ) 3-n′ (n=1-3, n′=1-3), or RC—CR′ alkyl.

19. The method of claim 18 wherein the dopant source comprises an alkyl precursor selected from H n C(CH 3 ) 4-n (n=0-4), H n (CH 3 ) 3-n C—H n′ (CH 3 ) 3-n′ (n=1-3, n′=1-3), or RC—CR′ alkyl.

20. A semiconductor device comprising:

a substrate; and

a doped low k dielectric layer doped with —CH 3 , wherein properties of the doped low k dielectric layer are stable when exposed to UV radiation.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 19, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 054481/0673 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2019
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049669/0775 →
CHANGE OF NAME Recorded Jun 9, 2011
From: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
To: CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
Reel/Frame 026413/0575 →
CHANGE OF NAME Recorded Jun 9, 2011
From: CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 026413/0589 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2009
From: LIU, HUANG; CHENG, JACK; LU, WEI; WANG, YIHUA; ZHOU, MEISHENG
To: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
Reel/Frame 022743/0259 →