IP Library Patent Application 12476202
Patent Application
App. No. 12/476,202

Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache

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Quick Facts
Patent No.
US None
App. No.
12/476,202
Abstract

Apparatus and systems utilizing multiple shader engines where each shader engine comprises multiple rows of shader engine filters combined with level one and level two cache systems. Each unified shader engine filter comprises a shader pipe array, and a texture mapping unit with access to a level one cache system and a level two cache. The shader pipe array accepts texture requests for a specified pixel from a resource and performs associated rendering calculations, outputting texel data. The texture mapping unit retrieves texel data stored in a level one cache system, with the ability to read and write to and from a level two cache system, and through formatting and bilinear filtering interpolations generates a formatted bilinear result based on the specific pixel's neighboring texels. Utilizing multiple rows of shader engine filters within a shader engine allows for the parallel processing of multiple simultaneous resource requests. Utilizing multiple shader engines allows for greater processing through the use of multiple simultaneous processing. A method utilizing multiple shader engines to perform texture mapping is also presented.

Claims (104)

1 . A scalable shader engine filtering system, comprising:

a shader engine;

a level one cache system;

a level two cache system; and

a sequencer,

wherein the shader engine is configured to accept texture requests, under the control of the sequencer, from one or more resources and generate a formatted interpolation based on texel data stored in the level one cache system, the level one cache system being configured to communicate with the level two cache system via a wide channel memory bus.

2 . The scalable shader engine filtering system of claim 1 , further comprising one or more shader engines.

3 . The scalable shader engine filtering system of claim 2 , wherein the shader engine comprises:

one or more engine rows, each engine row comprising:

a shader pipe array configured to accept a texture request from a resource whereby output texel data is generated based on rendering calculations for a specified pixel; and

a texture mapping unit configured to accept the texel data and generate a formatted interpolation.

4 . The scalable shader engine filtering system of claim 1 , wherein the level one cache system is configurable to be shared amongst other resources.

5 . The scalable shader engine filtering system of claim 3 , wherein each engine row further comprises a redundant shader pipe system configured to process shader pipe data destined to a defective shader pipe.

6 . The scalable shader engine filtering system of claim 5 , further comprising a redundant shader switch configured to control the switching of data input and output signals to the redundant shader pipe system when a defective shader pipe within the shader pipe array is identified by the sequencer.

7 . The scalable shader engine filtering system of claim 2 , wherein a shader pipe block is configured to contain one or more shader pipes.

8 . The scalable shader engine filtering system of claim 1 , wherein the level one cache system comprises one or more level one cache blocks where each level one cache block is associated with a shader pipe texture mapping unit whereby the shader pipe texture mapping unit is configured to read and write data to and from the level one cache block.

9 . The scalable shader engine filtering system of claim 3 , wherein the texture mapping unit comprises:

a pre-formatter module configured to accept texel data and generate normalized fixed point texel data;

an interpolator module configured to perform an interpolation on the normalized fixed point texel data from the pre-formatter module and generate re-normalized floating point texel data;

an accumulator module configured to accumulate floating point texel data from the interpolator module; and

a format module configured to convert texel data from the accumulator module into a standard floating point representation.

10 . The scalable shader engine filtering system of claim 9 , wherein the interpolator module is configured to perform one or more interpolations in order to achieve at least one of:

a bilinear texture filtering;

a trilinear texture filtering; and

an anisotropic texture filtering.

11 . A method for scalable shader engine filtering, comprising:

receiving texture requests from a plurality of resources in parallel for a plurality of specified pixels;

allocating the texture requests amongst a plurality of shader engines;

generating a set of output texel data for each specified pixel;

retrieving texel data; and

calculating a formatted interpolation for each set of texel data in parallel.

12 . The scalable shader engine filtering method of claim 11 , further comprising:

processing shader pipe data destined to one or more defective shader pipes.

13 . The scalable shader engine filtering method of claim 11 , further comprising:

utilizing multi-level caching algorithms to increase performance.

14 . The scalable shader engine filtering method of claim 11 , further comprising:

receiving floating point texel data;

generating normalized fixed point texel data from the floating point texel data;

performing an interpolation on the normalized fixed point texel data;

generating re-normalized floating point texel data;

accumulating re-normalized texel data; and

formatting the accumulated re-normalized texel data into a standard floating point representation.

15 . The scalable shader engine filtering method of claim 14 , wherein interpolation calculating comprises:

filtering using a bilinear texture filter;

filtering using a trilinear texture filter; and

filtering using an anisotropic texture filter.

16 . The scalable shader engine filtering method of claim 11 , wherein the method is performed by synthesizing hardware description language instructions.

17 . A system for scalable shader engine filtering, comprising:

a processor; and

a memory in communication with said processor, said memory for storing a plurality of processing instructions for directing said processor to:

receive texture requests from a plurality of resources for a plurality of specified pixels;

allocate the texture requests amongst a plurality of shader engines;

generate a set of output texel data for each specified pixel based on rendering calculations;

retrieve texel data from a level one cache system; and

calculate a formatted interpolation for each set of texel data in parallel utilizing a texture filter.

18 . A system according to claim 17 further comprising instructions for causing said processor to:

process shader pipe data destined to one or more defective shader pipes.

19 . A system according to claim 17 further comprising instructions for causing said processor to:

read and write to a level two cache system from the level one cache system.

20 . A system according to claim 17 further comprising instructions for causing said processor to:

receive floating point texel data;

generate normalized fixed point texel data from the floating point texel data;

perform an interpolation on the normalized fixed point texel data;

generate re-normalized floating point texel data;

accumulate re-normalized texel data; and

format the accumulated re-normalized texel data into a standard floating point representation.

21 . A system according to claim 17 further comprising instructions for causing said processor to:

perform a bilinear texture filter;

perform a trilinear texture filter; and

perform an anisotropic texture filter.

22 . A system for scalable shader engine filtering, comprising:

means for receiving texture requests from a plurality of resources for a plurality of specified pixels;

means for allocating the texture requests amongst a plurality of shader engines;

means for generating a set of output texel data for each specified pixel based on rendering calculations;

means for retrieving texel data from a level one cache system; and

means for calculating a formatted interpolation for each set of texel data in parallel utilizing a texture filter.

23 . A system according to claim 23 , further comprising:

means for processing shader pipe data destined to one or more defective shader pipes.

24 . A system according to claim 23 , further comprising:

means for reading and writing to and from a level two cache system from the level one cache system.

25 . A system according to claim 23 , further comprising:

means for receiving floating point texel data;

means for generating normalized fixed point texel data from the floating point texel data;

means for performing an interpolation on the normalized fixed point texel data;

means for generating re-normalized floating point texel data;

means for accumulating re-normalized texel data; and

means for formatting the accumulated re-normalized texel data into a standard floating point representation.

26 . A system according to claim 23 , further comprising:

means for performing a bilinear texture filter;

means for performing a trilinear texture filter; and

means for performing an anisotropic texture filter.

27 . A computer readable medium carrying one or more sequences of one or more instructions for execution by one or more processor-based computing systems which when executed causes the computer systems to perform a method for scalable shader complex filtering, comprising:

receiving texture requests from a plurality of resources for a plurality of specified pixels;

allocating the texture requests amongst a plurality of shader engines;

generating a set of output texel data for each specified pixel based on rendering calculations;

retrieving texel data from a level one cache system; and

calculating a formatted interpolation for each set of texel data in parallel utilizing a texture filter.

28 . The computer readable medium according to claim 28 wherein the method for scalable shader complex filtering further comprises:

receiving floating point texel data;

generating normalized fixed point texel data from the floating point texel data;

performing an interpolation on the normalized fixed point texel data;

generating re-normalized floating point texel data;

accumulating re-normalized texel data; and

formatting the accumulated re-normalized texel data into a standard floating point representation.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2024
From: ADVANCED MICRO DEVICES, INC.
To: ONESTA IP, LLC
Reel/Frame 069381/0951 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2009
From: DELAURIER, ANTHONY P.; LEATHER, MARK; HARTOG, ROBERT S.; MANTOR, MICHAEL J.; FOWLER, MARK C.; BRADY, JEFFREY T.; ZINI, MARCOS P.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 023190/0209 →