Patent Assignment
Reel/Frame 069381/0951
Assignment of Assignor's Interest
Recorded: 2024-11-18
Pages: 33
Assignor
ADVANCED MICRO DEVICES, INC.
Executed: 2024-11-08
Assignee
ONESTA IP, LLC
2 PAUL ROAD, WAYNE, PENNSYLVANIA, 19087
Covered Properties
(81)
Texture Compression Techniques
Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache
Application:
12/476,202 →
Publication:
US US20090309896A1
Unified Shader Engine Filtering System
Application:
12/476,152 →
Publication:
US US20090315909A1
Determining Performance Sensitivities of Computational Units
Application:
12/508,902 →
Publication:
US US20110022356A1
Memory Pools in a Memory Model for a Unified Computing System
Memory Heaps in a Memory Model for a Unified Computing System
Application:
15/254,466 →
Publication:
US US20160371197A1
Gpu Chiplets Using High Bandwidth Crosslinks
Application:
18/388,602 →
Publication:
US US20240330196A1
Video Data Capture and Streaming
Application:
11/960,640 →
Publication:
US US20080278595A1
Error Detection in High-Speed Asymmetric Interfaces
Error Detection in High-Speed Asymmetric Interfaces
Patent:
8,661,300 →
Application:
13/169,977 →
Error detection in high-speed asymmetric interfaces utilizing dedicated interface lines
Method of Forming a Metal Layer Over a Patterned Dielectric by Wet Chemical Deposition Including an Electroless and a Powered Phase
Method of Forming a Field Effect Transistor
Method of Forming a Field Effect Transistor
Apparatus and Method of Prefetching Data in Response to a Cache Miss
Portable Computing Platform Having Multiple Operating Modes and Heterogeneous Processors
Method of Selectively Forming a Conductive Barrier Layer by Ald
System for Driving and Controlling a Movable Electrode Assembly in an Electrochemical Process Tool
Distributed Dispatch with Concurrent, Out-of-Order Dispatch
Soi Device Having a Substrate Diode with Process Tolerant Configuration and Method of Forming the Soi Device
Soi Device Having a Substrate Diode with Process Tolerant Configuration and Method of Forming the Soi Device
Caching of Microcode Emulation Memory
Semiconductor Device with Gel-Type Thermal Interface Material
Second Chance Replacement Mechanism for a Highly Associative Cache Memory of a Processor
Reduced Leakage Voltage Level Shifting Circuit
Method for Selectively Removing a Spacer in a Dual Stress Liner Approach
Floating Point Texture Filtering Using Unsigned Linear Interpolators and Block Normalizations
Scalable and Unified Compute System
Redundancy Method and Apparatus for Shader Column Repair
Redundancy Method and Apparatus for Shader Column Repair
Redundancy Method and Apparatus for Shader Column Repair
Redundancy Method and Apparatus for Shader Column Repair
Redundancy Method and Apparatus for Shader Column Repair
Shader Complex with Distributed Level One Cache System and Centralized Level Two Cache
Mechanism for Fast Detection of Overshift in a Floating Point Unit of a Processing Device
Altering Performance of Computational Units Heterogeneously According to Performance Sensitivity
Throttling Computational Units According to Performance Sensitivity
Processing Unit That Enables Asynchronous Task Dispatch
Identification of Critical Enables Using Mea and Waa Metrics
System and Method for Accessing Resources of a Pci Express Compliant Device
Scan or Jtag Controllable Capture Clock Generation
Scan or Jtag Controllable Capture Clock Generation
Semiconductor Chip with Reinforcing Through-Silicon-Vias
Method and Apparatus for Reducing Processor Cache Pollution Caused by Aggressive Prefetching
Methods and Apparatus to Test Multi Clock Domain Data Paths with a Shared Capture Clock Signal
Method and System for Synchronizing Thread Wavefront Data and Events
Priority-Based Command Execution
Priority-Based Command Execution
Method and Apparatus for Addressing and Improving Holds in Logic Networks
Parity Error Detection Verification
Data Bus Inversion Coding
Off Chip Memory for Distributed Tessellation
Memory Heaps in a Memory Model for a Unified Computing System
Memory Heaps in a Memory Model for a Unified Computing System
Memory Pools in a Memory Model for a Unified Computing System
Memory Pools in a Memory Model for a Unified Computing System
Memory Heaps in a Memory Model for a Unified Computing System
Method and System for Opportunistic Load Balancing in Neural Networks Using Metadata
Method and System for Opportunistic Load Balancing in Neural Networks Using Metadata
Throttling While Managing Upstream Resources
Throttling While Managing Upstream Resources
Gpu Chiplets Using High Bandwidth Crosslinks
Lid Attach Process
Patent:
8,497,162 →
Application:
11/379,741 →
Allocating Store Queue Entries to Store Instructions for Early Store-to-Load Forwarding
Software Video Transcoder with Gpu Acceleration
Software Video Transcoder with Gpu Acceleration
Software Video Encoder with GPU Acceleration
Lid Attach Process
Reagent Sets and Gene Signatures for Non-Genotoxic Hepatocarcinogenicity
PCT:
PCT/US2007/078790 ↗
High Speed Plate Pick Up and Interleaf Sheets Removal Apparatus
PCT:
PCT/US2008/000551 ↗
Apparatus and Methods for Underground Structures and Construction Thereof
PCT:
PCT/US2009/032275 ↗
Adaptive Correlation
PCT:
PCT/US2009/045916 ↗
Apparatus for Grouping Articles and Method of Performing Same
PCT:
PCT/US2009/045918 ↗
Mobilization Device
PCT:
PCT/US2011/028986 ↗
An Apparatus and Method for Dermal Delivery
PCT:
PCT/US2012/040274 ↗
Clutch System for a Transmission
PCT:
PCT/US2012/047526 ↗
Compatibility and Optimization of Web Applications Across Independent Application Stores
PCT:
PCT/US2013/048441 ↗
Adhesives Produced Using Aspartate-Terminated Prepolymers
PCT:
PCT/US2020/063952 ↗
Process for Production of 3,4-Dichlorobutene-1
PCT:
PCT/US2010/054011 ↗
"Dialysis System with Efficient Battery Back-Up"
PCT:
PCT/US2008/053799 ↗
Efficient Muller C-Element Implementation for High Bit-Width Asynchronous Applications
PCT:
PCT/US2021/062197 ↗
Related Assignments
(16)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jun 7, 2006
From: KELTCHER, PAUL S.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 017965/0579 →
Assignment of Assignor's Interest
Jun 30, 2006
From: POLZIN, R. STEPHEN; EDWARDS, WILLIAM T.; OBER, ROBERT
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 018072/0277 →
Assignment of Assignor's Interest
Sep 28, 2006
From: PREUSSE, AXEL; WEHNER, SUSANNE; NOPPER, MARKUS
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 018318/0166 →
Assignment of Assignor's Interest
Nov 29, 2006
From: MACRI, JOSEPH; MOREIN, STEPHEN; GAUTHIER, CLAUDE; LEE, MING-JU E.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 018582/0292 →
Assignment of Assignor's Interest
Dec 4, 2006
From: WEI, ANDY; KAMMLER, THORSTEN; HOENTSCHEL, JAN; HORSTMANN, MANFRED
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 018577/0766 →
Assignment of Assignor's Interest
Dec 21, 2006
From: MACRI, JOSEPH; MOREIN, STEPHEN; GAUTHLER,CLAUDE; LEE, MING-JU E.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 018684/0800 →
Assignment of Assignor's Interest
Feb 13, 2007
From: SHEN, GENE W.; LIE, SEAN
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 018887/0117 →
Assignment of Assignor's Interest
Jun 1, 2007
From: FEUSTEL, FRANK; PETERS, CARSTEN; FOLTYN, THOMAS
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 019370/0589 →
Assignment of Assignor's Interest
Sep 26, 2007
From: PIETZNER, MICHAEL; ILLGEN, MARIO; SIURY, KERSTIN; KUECHENMEISTER, FRANK
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 019880/0239 →
Assignment of Assignor's Interest
Dec 19, 2007
From: SCHMIT, MICHAEL L.; KILLEBREW, CARRELL DANIEL; GURUMURTHY, SHIVASHANKAR
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 020274/0306 →
Assignment of Assignor's Interest
Jul 24, 2009
From: NUSSBAUM, SEBASTIEN; BRANOVER, ALEXANDER; KALAMATIANOS, JOHN
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 023004/0728 →
Assignment of Assignor's Interest
Sep 3, 2009
From: DELAURIER, ANTHONY P.; LEATHER, MARK; HARTOG, ROBERT S.; MANTOR, MICHAEL J.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 023190/0110 →
Assignment of Assignor's Interest
Sep 3, 2009
From: DELAURIER, ANTHONY P.; LEATHER, MARK; HARTOG, ROBERT S.; MANTOR, MICHAEL J.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 023190/0209 →
Assignment of Assignor's Interest
Jan 8, 2024
From: SALEH, SKYLER J.; NAFFZIGER, SAMUEL; BHAGAVAT, MILIND S.; AGARWAL, RAHUL
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 066053/0982 →
Assignment of Assignor's Interest
Nov 15, 2024
From: ATI TECHNOLOGIES ULC
To: ONESTA IP, LLC
Reel/Frame 069379/0556 →
Assignment of Assignor's Interest
Jun 8, 2025
From: ONESTA IP LLC
To: MAGNUSON RESEARCH LLC
Reel/Frame 071352/0575 →