IP Library Granted Patent US 11,741,019
Granted Patent B2
US 11,741,019 · App. 17/471,552 · Granted Aug 29, 2023

Memory pools in a memory model for a unified computing system

Inventors: Anthony Asaro (Markham, CA); Kevin Normoyle (Los Gatos, CA); Mark Hummel (Franklin, MA)
Assignees: Advanced Micro Devices, Inc.; ATI Technologies ULC
G06F12/1036G06F12/0284G06F12/0646G06F12/08G06F12/109G06F12/10G06F2212/1012G06F2212/152G06F2212/656G06F2212/657
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Quick Facts
Patent No.
US 11,741,019
App. No.
17/471,552
Granted
Aug 29, 2023
Kind
B2
Abstract

A method and system for allocating memory to a memory operation executed by a processor in a computer arrangement having a plurality of processors. The method includes receiving a memory operation from a processor that references an address in a shared memory, mapping the received memory operation to at least one virtual memory pool to produce a mapping result, and providing the mapping result to the processor.

Claims (29)

1. A method for allocating memory in a computer system having a plurality of processors, the method comprising:

receiving a memory operation from a processor that references an address in a shared memory;

mapping the received memory operation to at least one virtual memory pool to produce a mapping result, wherein the at least one virtual memory pool is associated with at least one memory resource; and

providing the mapping result to the processor.

2. The method of claim 1 , wherein the mapping of the received memory operation to the at least one memory pool to produce a mapping result depends on the processor from which the memory operation originated.

3. The method of claim 1 , further comprising performing, by at least one of the plurality of processors, the memory operation using the mapping result using memory resources.

4. The method of claim 1 , wherein the memory operation is a memory access request for a shared memory address.

5. The method of claim 1 , wherein each virtual memory pool is associated with at least one memory resource.

6. The method of claim 1 , wherein the at least one virtual memory pool is associated with only one physical memory resource.

7. The method of claim 1 , wherein the at least one virtual memory pool is associated with a plurality of physical memory resources.

8. The method of claim 1 , wherein the at least one virtual memory pool is not accessible by one processor of the plurality of processors.

9. The method of claim 1 , wherein the at least one virtual memory pool is accessible by all processors of the plurality of processors.

10. The method of claim 1 , wherein the at least one virtual memory pool is accessible only by a specific type of processor.

11. A computer system comprising:

a plurality of processors;

a shared memory; and

a mapper, wherein the mapper is configured to:

receive a memory operation from a processor that references an address in the shared memory;

map the received memory operation to at least one virtual memory pool to produce a mapping result, wherein the at least one virtual memory pool is associated with at least one memory resource; and

provide the mapping result to the processor.

12. The computer system of claim 11 , wherein the mapping of the received memory operation to the at least one virtual memory pool to produce a mapping result depends on the processor from which the memory operation originated.

13. The computer system of claim 11 , wherein at least one of the plurality of processors is configured to perform the memory operation using the mapping result.

14. The computer system of claim 11 , wherein the memory operation is a memory access request for a shared memory address.

15. The computer system of claim 11 , wherein each virtual memory pool is associated with at least one memory resource.

16. The computer system of claim 11 , wherein the at least one virtual memory pool is associated with only one physical memory resource.

17. The computer system of claim 11 , wherein the at least one virtual memory pool is associated with a plurality of physical memory resources.

18. The computer system of claim 11 , wherein the at least one virtual memory pool is not accessible by one processor of the plurality of processors.

19. The computer system of claim 11 , wherein the at least one virtual memory pool is accessible by all processors of the plurality of processors.

20. The computer system of claim 11 , wherein the at least one virtual memory pool is accessible only by a specific type of processor.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2025
From: ASARO, ANTHONY
To: ATI TECHNOLOGIES ULC
Reel/Frame 070774/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2025
From: NORMOYLE, KEVIN; HUMMEL, MARK
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 070774/0699 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2024
From: ADVANCED MICRO DEVICES, INC.
To: ONESTA IP, LLC
Reel/Frame 069381/0951 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2024
From: ATI TECHNOLOGIES ULC
To: ONESTA IP, LLC
Reel/Frame 069379/0556 →
Continuity (7)
Continuation 16443385 · Jun 17, 2019
Continuation 15695683 · Sep 5, 2017
Continuation 15254466 · Sep 1, 2016
Continuation 14833850 · Aug 24, 2015
Continuation 13724879 · Dec 21, 2012
Provisional Application 61617405 · Mar 29, 2012
Related Publication 20210406196A1 · Dec 30, 2021
Cited By (1)
US 12,360,918