IP Library Granted Patent US 7,927,988
Granted Patent B2
US 7,927,988 · App. 12/488,577 · Granted Apr 19, 2011

Method of fabricating semiconductor device

Assignee: Electronics and Telecommunications Research Institute
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Quick Facts
Patent No.
US 7,927,988
App. No.
12/488,577
Granted
Apr 19, 2011
Kind
B2
Abstract

Provided is a method of fabricating a semiconductor device. The method includes forming a first layer, a second layer, an ion implantation layer between the first and second layers, and an anti-oxidation layer on the second layer, and performing a heat treating process to form an insulating layer between the first and second layers while preventing loss of the second layer using the anti-oxidation layer.

Claims (31)

1. A method of fabricating a silicon-on-insulator (SOI) substrate for a semiconductor device, the method comprising:

providing a first substrate layer, a second substrate layer, an ion implantation layer between the first and second substrate layers;

providing an anti-oxidation layer over the second substrate layer; and

performing a heat treating process to convert the ion implantation layer into an insulating layer, the insulating layer being provided between the first and second substrate layers,

wherein the anti-oxidation layer is configured to protect the second substrate layer from being oxidized during the heat treating process.

2. The method of claim 1 , wherein the ion implantation layer is provided between the first and second substrate layers by performing an ion implantation process on a semiconductor substrate,

the semiconductor substrate being exposed through an ion implantation prevention mask.

3. The method of claim 1 , wherein the anti-oxidation layer is partially oxidized through the heat treating process.

4. The method of claim 1 , wherein the anti-oxidation layer comprises polysilicon or crystalline silicon, or both.

5. The method of claim 1 , wherein the first and second substrate layers each includes crystalline silicon, and the ion implantation layer comprises oxygen.

6. The method of claim 1 , further comprising removing the anti-oxidation layer after the heat treating process.

7. The method of claim 1 , further comprising forming a sacrificial layer between the second layer and the anti-oxidation layer.

8. The method of claim 7 , wherein the sacrificial layer comprises a material having an etch selectivity to the first and second substrate layers and the anti-oxidation layer.

9. The method of claim 8 , wherein the sacrificial layer comprises a silicon oxide layer formed through a low pressure chemical vapor deposition process.

10. The method of claim 8 , wherein the anti-oxidation layer comprises a polysilicon layer formed through the low pressure chemical vapor deposition process.

11. A method of fabricating a semiconductor device, the method comprising:

forming a first layer, a second layer, and an ion implantation layer between the first and second layers;

forming an anti-oxidation layer on the second layer; and

thermally treating the ion implantation layer to convert at least part of the ion-implantation layer into an insulation layer,

wherein the anti-oxidation layer is configured to minimize oxidation of the second layer during the thermal treatment of the ion implantation layer,

wherein the anti-oxidation layer is entirely oxidized through the heat treating process, or the anti-oxidation layer is entirely oxidized and the second layer is partially oxidized through the heat treating process.

12. A method for fabricating a semiconductor device, the method comprising:

providing a substrate;

implanting ions into the substrate such that an ion implantation layer is formed to define a first semiconductor layer and a second semiconductor layer, the ion implantation layer being disposed between the first and second semiconductor layers;

forming an anti-oxidation layer on the second semiconductor layer; and

thermally treating the ion implantation layer to convert at least part of the ion-implantation layer into an insulating layer,

wherein the anti-oxidation layer is configured to protect the second semiconductor layer from being oxidized,

wherein the first and the second semiconductor layers each includes crystalline silicon, and the ion implantation layer comprises oxygen.

13. The method of claim 12 , wherein the anti-oxidation layer is formed after the ion-implantation layer.

14. The method of claim 12 , wherein the anti-oxidation layer is at least substantially oxidized by the thermal treatment.

15. The method of claim 14 , the second layer is partially oxidized by the thermal treatment.

Assignments (3)
TERMINATION AGREEMENT Recorded Jun 2, 2020
From: IDEAHUB INC.
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 052816/0910 →
LICENSE Recorded Mar 14, 2019
From: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
To: IDEAHUB INC
Reel/Frame 048600/0931 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2009
From: KIM, IN-GYOO; KWON, O-KYUN; SUH, DONG-WOO; KIM, GYUNG-OCK
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 022871/0387 →
Priority Claims (1)
KR 10-2008-0131060 · Dec 22, 2008 · national
Continuity (1)
Related Publication 20100159674A1 · Jun 24, 2010