Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate
View Patent ↗A complementary metal oxide semiconductor integrated circuit may be formed with a PMOS device formed using a replacement metal gate and a raised source drain. The raised source drain may be formed of epitaxially deposited silicon germanium material that is doped p-type. The replacement metal gate process results in a metal gate electrode and may involve the removal of a nitride etch stop layer.
1. A semiconductor structure comprising:
a metal gate electrode having a coefficient of thermal expansion greater than 0.4×10 −5 in./in./degree C.;
a substrate having trenches;
sidewall spacers on said gate electrode;
trenches in said substrate aligned with said sidewall spacers;
raised source and drains, each formed in one of said trenches; and
a compressively strained channel under said metal gate electrode.
2. The structure of claim 1 wherein said p-type raised source drain is formed of silicon and germanium.
3. The structure of claim 1 including a U-shaped gate dielectric.
4. The structure of claim 3 including a gate dielectric having a dielectric constant greater than 10.
5. The structure of claim 1 wherein said gate electrode is formed from a material selected from the group consisting of ruthenium, palladium, platinum, cobalt, nickel, and conductive metal oxides.