IP Library Granted Patent US 8,069,130
Granted Patent B2
US 8,069,130 · App. 12/493,460 · Granted Nov 29, 2011

Methods and systems for semiconductor testing using a testing scenario language

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Quick Facts
Patent No.
US 8,069,130
App. No.
12/493,460
Granted
Nov 29, 2011
Kind
B2
Abstract

Methods and systems for semiconductor testing. In one embodiment, a semiconductor testing method includes one or more of the following stages: defining a rule relating to semiconductor testing, validating the rule, bundling the rule with other rules, correlating the rule with other rules, publishing the rule, actualizing the rule, and follow up relating to the rule. In one embodiment, a semiconductor testing system includes one or more of the following modules: rule creation module(s), analysis module(s), simulation module(s), real time production module(s), and offline production module(s). In one embodiment, user friendly graphical user interface(s) can be used for defining the building blocks of a rule and/or for viewing an optional hierarchy of categories to which the rule belongs.

Claims (42)

1. A computer-implemented method of semiconductor testing, said method comprising:

defining a first semiconductor testing rule, said semiconductor testing rule relating to semiconductor testing;

validating said first semiconductor testing rule as being appropriate for a semiconductor testing system;

bundling said first semiconductor testing rule with other semiconductor testing rules;

correlating said first semiconductor testing rule with other semiconductor testing rules;

publishing said first semiconductor testing rule so that said rule is prepared for actualization; and

actualizing said published first semiconductor testing rule.

2. The method of claim 1 , wherein said actualizing said published first semiconductor testing rule comprises executing a simulation, said method further comprising:

analyzing said actualizing;

publishing said first semiconductor testing rule for production; and

actualizing said first semiconductor testing rule in production.

3. The method of claim 1 , wherein defining said first semiconductor testing rule comprises defining said rule at least in part on the basis of analysis of past semiconductor testing results.

4. The method of claim 1 , wherein said defining said first semiconductor testing rule includes: receiving input from a user.

5. The method of claim 1 , further comprising: following up on said actualizing.

6. A system for semiconductor testing, comprising:

a programmed computer; and

computer-readable memory having, tangibly embodied thereon:

means for defining a first semiconductor testing rule relating to semiconductor testing;

means for validating said first semiconductor testing rule as being appropriate for said semiconductor testing system;

means for bundling said first semiconductor testing rule with other semiconductor testing rules;

means for correlating said first semiconductor testing rule with other semiconductor testing rules;

means for publishing said first semiconductor testing rule so that said first semiconductor testing rule is prepared for actualization; and

means for actualizing said published first semiconductor testing rule.

7. A computer program product comprising a statutory machine readable memory having computer readable program code embodied therein for semiconductor testing, the computer program product comprising:

computer readable program code for causing a computer to define a first semiconductor testing rule relating to semiconductor testing;

computer readable program code for causing a computer to validate said first semiconductor testing rule as being appropriate for a semiconductor testing system;

computer readable program code for causing a computer to bundle said first semiconductor testing rule with other semiconductor testing rules;

computer readable program code for causing a computer to correlate said first semiconductor testing rule with other semiconductor testing rules;

computer readable program code for causing a computer to publish said first semiconductor testing rule so that said rule is prepared for actualization; and

computer readable program code for causing a computer to actualize said published first semiconductor testing rule.

8. The method of claim 1 , wherein defining a first semiconductor testing rule comprises defining a parameter associated with said rule.

9. The method of claim 8 , wherein defining a parameter comprises defining monitored data to be leveraged.

10. The method of claim 8 , wherein defining a parameter comprises defining a population of semiconductor devices upon which said rule is to be executed.

11. The method of claim 8 , wherein defining a parameter comprises defining an entry condition.

12. The method of claim 8 , wherein defining a parameter comprises defining a rule action to be taken if rule criteria are met.

13. The method of claim 8 , wherein defining a parameter comprises defining a validity condition to determine if the rule is still applicable.

14. The method of claim 8 , wherein defining a parameter comprises defining a run point, said run point being an event that triggers the rule.

15. The method of claim 8 , wherein defining a parameter comprises defining an end point.

16. The method of claim 8 , wherein defining a parameter comprises defining a rule scope.

17. The method of claim 8 , wherein defining a parameter comprises defining an algorithm object.

18. The method of claim 8 , wherein defining a parameter comprises defining a rule state.

19. The method of claim 8 , wherein defining a parameter comprises defining at least one of a name, description, comment, and rule ID.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2021
From: BALOG, GIL
To: OPTIMALTEST LTD.
Reel/Frame 055850/0658 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: BANK LEUMI LE-ISRAEL B.M.
To: OPTIMAL PLUS LTD.
Reel/Frame 052838/0945 →
SECURITY INTEREST Recorded Dec 3, 2019
From: OPTIMAL PLUS LTD.
To: BANK LEUMI LE-ISRAEL B.M.
Reel/Frame 051155/0161 →
CHANGE OF NAME Recorded Sep 4, 2014
From: OPTIMAL TEST LTD
To: OPTIMAL PLUS LTD
Reel/Frame 033685/0637 →