IP Library Granted Patent US 8,105,949
Granted Patent B2
US 8,105,949 · App. 12/493,667 · Granted Jan 31, 2012

Substrate processing method

Assignee: Tokyo Electron Limited
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Quick Facts
Patent No.
US 8,105,949
App. No.
12/493,667
Granted
Jan 31, 2012
Kind
B2
Abstract

A substrate processing method that forms an opening, which has a size that fills the need for downsizing a semiconductor device and is to be transferred to an amorphous carbon film, in a photoresist film of a substrate to be processed. Deposit is accumulated on a side wall surface of the opening in the photoresist film using plasma produced from a deposition gas having a gas attachment coefficient S of 0.1 to 1.0 so as to reduce the opening width of the opening.

Claims (14)

1. A substrate processing method that processes a substrate in which a to-be-processed layer, an intermediate layer, and a mask layer are stacked in this order, and in which the mask layer has an opening to which part of the intermediate layer is exposed, comprising:

performing a shrinking etching by carrying out the following steps in one step:

reducing an opening width by accumulating deposit on a side wall surface of the opening in the mask layer using plasma produced from a mixed gas of a deposition gas and an anisotropic etching gas, and

etching the intermediate layer that forms a bottom of the opening; and

etching a to-be-processed layer by transferring the opening in the intermediate layer corresponding to the opening in the mask layer reduced in opening width in said shrinking etching step onto the to-be-processed layer using plasma produced from a non-deposition gas,

wherein the anisotropic etching gas is a gas that has a higher molecular weight than the deposition gas and contains a halogen element of a higher atomic number than bromine (Br), or sulfur (S) or an element of a higher atomic number than sulfur (S) in the 16th group of the periodic system.

2. A substrate processing method as claimed in claim 1 , wherein the deposition gas is represented by a general expression, C x H y F z (x, y, and z are 0 or positive integers).

3. A substrate processing method as claimed in claim 2 , wherein the deposition gas is CHF 3 gas.

4. A substrate processing method as claimed in claim 1 , wherein the anisotropic etching gas is CF 3 I gas or Hl gas.

5. A substrate processing method as claimed in claim 1 , wherein a mixing ratio of the deposition gas to the anisotropic etching gas is 6:1 to 1:1.

6. A substrate processing method as claimed in claim 1 , wherein in said shrinking etching step, bias electrical power of 100 W to 500 W is applied to the substrate.

7. A substrate processing method as claimed in claim 1 , wherein in said shrinking etching step, a pressure in a chamber in which the substrate is accommodated is adjusted to 2.6 Pa (20 mTorr) to 2×10 Pa (150 mTorr).

8. A substrate processing method as claimed in claim 1 , wherein the intermediate layer etched in said shrinking etching step consists of two stacked films comprising an antireflective film and a silicon-containing film, or an antireflective film and a metallic film or a silicon-containing organic film stacked below the mask layer.

9. The substrate processing method as claimed in claim 1 , wherein the non-deposition gas comprises N 2 gas and O 2 gas.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2009
From: HONDA, MASANOBU; ICHIKAWA, HIRONOBU
To: TOKYO ELECTRON LIMITED
Reel/Frame 022894/0338 →
Priority Claims (2)
JP 2008-181729 · Jul 11, 2008 · national
JP 2009-026127 · Feb 6, 2009 · national
Continuity (2)
Provisional Application 61092619 · Aug 28, 2008
Related Publication 20100009542A1 · Jan 14, 2010