SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device contains a semiconductor substrate having a p-type semiconductor layer and an n-type channel layer formed thereon; gate trenches extended through the channel layer so as to reach the p-type semiconductor layer; oxide films formed over the bottom and inner wall of the gate trenches, the oxide films being formed thicker over the bottom of the gate trenches than over the inner wall; gate electrodes formed so as to fill the gate trenches; n-type regions formed at the bottom of the gate trenches, and containing arsenic as a major n-type impurity component; low concentration p-type regions formed under the n-type regions, and having a low p-type impurity concentration; and a drain electrode formed on the back surface of the substrate.
1 . A semiconductor device comprising:
a substrate containing a p-type semiconductor layer, and an n-type channel layer formed over said p-type semiconductor layer;
a trench extended through said channel layer so as to reach said p-type semiconductor layer;
an oxide film formed over the bottom and inner wall of said trench, said oxide film being formed thicker over the bottom of said trench than over the inner wall of said trench;
a gate electrode formed in said trench over said oxide film so as to fill said trench;
an n-type region formed in said p-type semiconductor layer at the bottom of said trench, and containing arsenic as a major n-type impurity component;
a low concentration p-type region formed in said p-type semiconductor layer at the bottom of said trench and under said n-type region, and having a p-type impurity concentration lower than that in the other portion of said p-type semiconductor layer; and
a drain electrode formed on the back surface of said substrate.
2 . The semiconductor device as claimed in claim 1 ,
wherein said low concentration p-type region contains phosphorus as a major n-type impurity component.
3 . A method of manufacturing a semiconductor device comprising:
forming a trench in a substrate having a p-type semiconductor layer formed in the surficial portion thereof;
introducing an n-type impurity to the bottom of said trench by ion implantation;
oxidizing the surface of said substrate to thereby form an oxide film on the inner wall of said trench, and forming an n-type region at the bottom of said trench and a low concentration p-type region having a p-type impurity concentration lower than that in the other portion of said p-type semiconductor layer, under said n-type region, all of which proceeded by annealing;
forming a gate electrode in said trench;
introducing an n-type impurity over the entire surface of said substrate by ion implantation, to thereby form an n-type channel layer in the upper portion of said p-type semiconductor layer; and
forming a drain electrode over the back surface of said substrate,
wherein said introducing an n-type impurity by ion implantation includes at least a step of introducing arsenic as said n-type impurity, and
in said forming said n-type region and said low concentration p-type region, said n-type region contains arsenic as a main n-type impurity component, and said oxide film is formed thicker over the bottom of said trench than over the inner wall of said trench.
4 . The method of manufacturing a semiconductor device as claimed in claim 3 ,
wherein, in said forming said n-type region and said low concentration p-type region, said oxide film is formed thicker over the bottom of said trench than over the inner wall of said trench, based on accelerated oxidation contributed by arsenic contained in said n-type region at the bottom of said trench.
5 . The method of manufacturing a semiconductor device as claimed in claim 3 ,
wherein said introducing an n-type impurity further includes a step of introducing phosphorus as an n-type impurity, in addition to a step of introducing arsenic, and
in said forming said n-type region and said low concentration p-type region, said low concentration p-type region contains phosphorus as a major n-type impurity component.
6 . The method of manufacturing a semiconductor device as claimed in claim 4 ,
wherein said introducing an n-type impurity further includes a step of introducing phosphorus as an n-type impurity, in addition to a step of introducing arsenic, and
in said forming said n-type region and said low concentration p-type region, said low concentration p-type region contains phosphorus as a major n-type impurity component.
7 . The method of manufacturing a semiconductor device as claimed in claim 5 ,
wherein in said introducing an n-type impurity by ion implantation, phosphorus is introduced in said step of introducing phosphorus, to a depth deeper than a depth to which arsenic is introduced in said step of introducing arsenic.
8 . The method of manufacturing a semiconductor device as claimed in claim 6 ,
wherein in said introducing an n-type impurity by ion implantation, phosphorus is introduced in said step of introducing phosphorus, to a depth deeper than a depth to which arsenic is introduced in said step of introducing arsenic.