IP Library Patent Application 12543504
Patent Application
App. No. 12/543,504

SEMICONDUCTOR INTEGRATED CIRCUIT AND CIRCUIT OPERATION METHOD

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
12/543,504
Abstract

There is a need for reducing a chip footprint of a multimode-compatible semiconductor integrated circuit. A reception-based analog front-end unit converts a first RF reception signal according to a first communication system and a second RF reception signal according to a second communication system into a first reception-based analog base band signal having a large signal band and a second reception-based analog base band signal having a small signal band, respectively. An oversampling analog-to-digital converter generates first and second reception-based digital base band signals. A first digital filter is used for a decimation process on the first and second reception-based digital base band signals in common with each other. Second digital filters perform a down-sampling process to generate the first reception-based digital base band signal having the large first sampling rate. Third digital filters perform a down-sampling process to generate the second reception-based digital base band signal having the small second sampling rate.

Claims (88)

1 . A semiconductor integrated circuit comprising:

a reception-based analog front-end unit;

a reception-based digital front-end unit; and

a digital interface unit,

wherein the reception-based analog front-end unit functions as a receiver for down-converting an RF reception signal into a reception-based analog base band signal, the RF reception signal being received at an antenna mounted on a communication terminal,

wherein the reception-based digital front-end unit comprises an analog-to-digital converter and a reception-based digital filter unit,

wherein the analog-to-digital converter converts the reception-based analog base band signal supplied from an output of the reception-based analog front-end unit into a reception-based digital base band signal,

wherein the reception-based digital base band signal from the analog-to-digital converter is transmitted to the digital interface unit via the reception-based digital filter unit,

wherein the digital interface unit is capable of supplying an external digital base band processing unit with the reception-based digital base band signal transmitted from the reception-based digital filter unit,

wherein the reception-based analog front-end unit is capable of down-converting a first RF reception signal according to a first communication system and a second RF reception signal according to a second communication system received at the antenna into a first reception-based analog base band signal having a first signal band and a second reception-based analog base band signal having a second signal band narrower than the first signal band, respectively,

wherein the analog-to-digital converter of the reception-based digital front-end unit comprises an oversampling analog-to-digital converter,

wherein the oversampling analog-to-digital converter is capable of converting the first reception-based analog base band signal and the second reception-based analog base band signal supplied from the reception-based analog front-end unit into a first reception-based digital base band signal and a second reception-based digital base band signal, respectively,

wherein the reception-based digital filter unit of the reception-based digital front-end unit comprises a first digital filter coupled to an output of the oversampling analog-to-digital converter,

wherein the first digital filter is capable being used for a decimation process on the first reception-based digital base band signal supplied from the oversampling analog-to-digital converter and a decimation process on the second reception-based digital base band signal supplied from the oversampling analog-to-digital converter in common with each other,

wherein the reception-based digital filter unit further comprises a second digital filter and a third digital filter parallel coupled between an output of the first digital filter and the digital interface unit,

wherein the second digital filter down-samples the first reception-based digital base band signal, based on the first communication system, from the output of the first digital filter and thereby supplies the digital interface unit with the first reception-based digital base band signal having a first sampling rate, and

wherein the third digital filter down-samples the second reception-based digital base band signal, based on the second communication system, from the output of the first digital filter and thereby supplies the digital interface unit with the second reception-based digital base band signal having a second sampling rate smaller than the first sampling rate.

2 . The semiconductor integrated circuit according to claim 1 ,

wherein the second digital filter generates the first reception-based digital base band signal having the first sampling rate,

wherein the third digital filter generates the second reception-based digital base band signal having the second sampling rate, and

wherein the second digital filter and the third digital filter are provided with a down-sampling rate conversion ratio difference equivalent to a difference between the first signal band for the first reception-based analog base band signal and the second signal band for the second reception-based analog base band signal.

3 . The semiconductor integrated circuit according to claim 2 ,

wherein the second digital filter comprises an interpolation section having an interpolation ratio assigned a specified value, and

wherein the specified value of the interpolation ratio generates the down-sampling rate conversion ratio difference.

4 . The semiconductor integrated circuit according to claim 1 ,

wherein the reception-based digital front-end unit further comprises a reception memory buffer that temporarily stores the reception-based digital base band signal processed by the reception-based digital filter unit and then supplies the signal to the digital interface unit.

5 . The semiconductor integrated circuit according to claim 4 ,

wherein the second digital filter comprises a first root raised cosine filter for reducing an inter-decoding interference.

6 . The semiconductor integrated circuit according to claim 5 ,

wherein the reception-based analog front-end unit and the reception-based digital front-end unit process the first RF reception signal according to a WCDMA communication system as the first communication system and the second RF reception signal according to a GSM/EDGE communication system as the second communication system.

7 . The semiconductor integrated circuit according to claim 4 , further comprising:

a transmission-based digital front-end unit; and

a transmission-based analog front-end unit,

wherein the digital interface unit is capable of supplying the transmission-based digital front-end unit with a transmission-based digital base band signal transmitted from an outside digital base band processing unit,

wherein the transmission-based digital front-end unit comprises a transmission-based digital filter unit and a D/A converter,

wherein the transmission-based digital filter unit transmits the transmission-based digital base band signal supplied from the digital interface unit to the D/A converter,

wherein the D/A converter converts the transmission-based digital base band signal supplied from an output of the transmission-based digital filter unit into a transmission-based analog base band signal, and

wherein the transmission-based analog front-end unit functions as a transmitter that up-converts the transmission-based analog base band signal from an output of the D/A converter into an RF transmission signal.

8 . The semiconductor integrated circuit according to claim 7 ,

wherein the transmission-based digital filter unit comprises a fourth digital filter and a fifth digital filter parallel coupled between the digital interface unit and an input of the D/A converter,

wherein the fourth digital filter up-samples a first transmission-based digital base band signal, based on the first communication system, supplied from the digital interface unit and thereby supplies the input of the D/A converter with the first transmission-based digital base band signal having a third sampling rate, and

wherein the fifth digital filter up-samples a second transmission-based digital base band signal, based on the second communication system, supplied from the digital interface unit and thereby supplies the input of the D/A converter with the second transmission-based digital base band signal having a fourth sampling rate.

9 . The semiconductor integrated circuit according to claim 7 ,

wherein the transmission-based digital front-end unit further comprises a transmission buffer memory that temporarily stores transmission-based digital base band signal transmitted from the outside digital base band processing unit and then supplies the signal to the transmission-based digital filter unit.

10 . The semiconductor integrated circuit according to claim 9 ,

wherein the fourth digital filter comprises a second root raised cosine filter for reducing an inter-decoding interference.

11 . An operation method of a semiconductor integrated circuit comprising a reception-based analog front-end unit, a reception-based digital front-end unit, and a digital interface unit,

wherein the reception-based analog front-end unit functions as a receiver for down-converting an RF reception signal into a reception-based analog base band signal, the RF reception signal being received at an antenna mounted on a communication terminal,

wherein the reception-based digital front-end unit comprises an analog-to-digital converter and a reception-based digital filter unit,

wherein the analog-to-digital converter converts the reception-based analog base band signal supplied from an output of the reception-based analog front-end unit into a reception-based digital base band signal,

wherein the reception-based digital base band signal from the analog-to-digital converter is transmitted to the digital interface unit via the reception-based digital filter unit,

wherein the digital interface unit is capable of supplying an external digital base band processing unit with the reception-based digital base band signal transmitted from the reception-based digital filter unit,

wherein the reception-based analog front-end unit is capable of down-converting a first RF reception signal according to a first communication system and a second RF reception signal according to a second communication system received at the antenna into a first reception-based analog base band signal having a first signal band and a second reception-based analog base band signal having a second signal band narrower than the first signal band, respectively,

wherein the analog-to-digital converter of the reception-based digital front-end unit comprises an oversampling analog-to-digital converter,

wherein the oversampling analog-to-digital converter is capable of converting the first reception-based analog base band signal and the second reception-based analog base band signal supplied from the reception-based analog front-end unit into a first reception-based digital base band signal and a second reception-based digital base band signal, respectively,

wherein the reception-based digital filter unit of the reception-based digital front-end unit comprises a first digital filter coupled to an output of the oversampling analog-to-digital converter,

wherein the first digital filter is capable of being used for a decimation process on the first reception-based digital base band signal supplied from the oversampling analog-to-digital converter and a decimation process on the second reception-based digital base band signal supplied from the oversampling analog-to-digital converter in common with each other,

wherein the reception-based digital filter unit further comprises a second digital filter and a third digital filter parallel coupled between an output of the first digital filter and the digital interface unit,

wherein the second digital filter down-samples the first reception-based digital base band signal, based on the first communication system, from the output of the first digital filter and thereby supplies the digital interface unit with the first reception-based digital base band signal having a first sampling rate, and

wherein the third digital filter down-samples the second reception-based digital base band signal, based on the second communication system, from the output of the first digital filter and thereby supplies the digital interface unit with the second reception-based digital base band signal having a second sampling rate smaller than the first sampling rate.

12 . The operation method of the semiconductor integrated circuit according to claim 11 ,

wherein the second digital filter generates the first reception-based digital base band signal having the first sampling rate,

wherein the third digital filter generates the second reception-based digital base band signal having the second sampling rate, and

wherein the second digital filter and the third digital filter are provided with a down-sampling rate conversion ratio difference equivalent to a difference between the first signal band for the first reception-based analog base band signal and the second signal band for the second reception-based analog base band signal.

13 . The operation method of the semiconductor integrated circuit according to claim 12 ,

wherein the second digital filter comprises an interpolation section having an interpolation ratio assigned a specified value, and

wherein the specified value of the interpolation ratio generates the down-sampling rate conversion ratio difference.

14 . The operation method of the semiconductor integrated circuit according to claim 11 ,

wherein the reception-based digital front-end unit further comprises a reception memory buffer that temporarily stores the reception-based digital base band signal processed by the reception-based digital filter unit and then supplies the signal to the digital interface unit.

15 . The operation method of the semiconductor integrated circuit according to claim 14 ,

wherein the second digital filter comprises a first root raised cosine filter for reducing an inter-decoding interference.

16 . The operation method of the semiconductor integrated circuit according to claim 15 ,

wherein the reception-based analog front-end unit and the reception-based digital front-end unit process the first RF reception signal according to a WCDMA communication system as the first communication system and the second RF reception signal according to a GSM/EDGE communication system as the second communication system.

17 . The operation method of the semiconductor integrated circuit according to claim 14 ,

wherein the semiconductor integrated circuit further comprises a transmission-based digital front-end unit and a transmission-based analog front-end unit,

wherein the digital interface unit is capable of supplying the transmission-based digital front-end unit with a transmission-based digital base band signal transmitted from an outside digital base band processing unit,

wherein the transmission-based digital front-end unit comprises a transmission-based digital filter unit and a D/A converter,

wherein the transmission-based digital filter unit transmits the transmission-based digital base band signal supplied from the digital interface unit to the D/A converter,

wherein the D/A converter converts the transmission-based digital base band signal supplied from an output of the transmission-based digital filter unit into a transmission-based analog base band signal, and

wherein the transmission-based analog front-end unit functions as a transmitter that up-converts the transmission-based analog base band signal from an output of the D/A converter into an RF transmission signal.

18 . The operation method of the semiconductor integrated circuit according to claim 17 ,

wherein the transmission-based digital filter unit comprises a fourth digital filter and a fifth digital filter parallel coupled between the digital interface unit and an input of the D/A converter,

wherein the fourth digital filter up-samples a first transmission-based digital base band signal, based on the first communication system, supplied from the digital interface unit and thereby supplies the input of the D/A converter with the first transmission-based digital base band signal having a third sampling rate, and

wherein the fifth digital filter up-samples a second transmission-based digital base band signal, based on the second communication system, supplied from the digital interface unit and thereby supplies the input of the D/A converter with the second transmission-based digital base band signal having a fourth sampling rate.

19 . The operation method of the semiconductor integrated circuit according to claim 17 ,

wherein the transmission-based digital front-end unit further comprises a transmission buffer memory that temporarily stores the transmission-based digital base band signal transmitted from the outside digital base band processing unit and then supplies the signal to the transmission-based digital filter unit.

20 . The operation method of the semiconductor integrated circuit according to claim 19 ,

wherein the fourth digital filter comprises a second root raised cosine filter for reducing an inter-decoding interference.

Assignments (3)
CHANGE OF NAME Recorded Sep 10, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024982/0123 →
MERGER - EFFECTIVE DATE 04/01/2010 Recorded Sep 10, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024982/0198 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2009
From: AKAMINE, YUKINORI; HIKASA, KAZUHIKO; OKADA, YUKI; YAMAMOTO, SATORU
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 023122/0583 →