Audio clocking in video applications
View Patent ↗A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream.
1. A method of operating an audio converter, comprising:
deriving an audio converter clock signal;
processing encoded audio data to generate an audio data stream sampled at an audio sample rate; and
converting the audio data stream into audio output using the audio converter clock signal, wherein the frequency of the audio converter clock signal is a non-integer multiple of the audio sample rate, and the audio converter clock signal has a frequency equal to 27 MHz multiplied by N/M, where N and M are integers and M is less than or equal to 16.
2. A digital-to-analog converter comprising:
a system clock input for receiving a system clock signal;
a sample rate conversion unit which converts an input digital data stream having a first audio sampling rate into an output digital data stream having a second audio sampling rate equal to a rate of the system clock signal divided by an integer;
a delta-sigma modulator which produces a multilevel noise-shaped signal based on the output digital data stream; and
an analog filter which receives the multilevel noise-shaped signal.
3. The digital-to-analog converter of claim 2 wherein said delta-sigma modulator is a switch-capacitor modulator that operates at a rate equal to the rate of the system clock signal divided by the integer.
4. The digital-to-analog converter of claim 2 wherein said delta-sigma modulator is a continuous-time modulator that operates directly at the rate of the system clock signal.
5. The digital-to-analog converter of claim 2 wherein:
the system clock signal has a rate of 27 MHz; and
the input digital data stream has a first audio sampling rate selected from the group consisting of 44.1 kHz or 48 kHz.
6. The digital-to-analog converter of claim 2 wherein the system clock signal has a rate of 108/N MHz, where N is an integer.
7. The digital-to-analog converter of claim 2 wherein the system clock signal has a rate which is not an integer multiple of a rate of the first audio sampling rate.
8. The digital-to-analog converter of claim 2 wherein said analog filter is a continuous-time analog filter.
9. A method of operating an audio converter, comprising:
deriving an audio converter clock signal;
processing encoded audio data to generate an audio data stream sampled at an audio sample rate; and
converting the audio data stream into audio output using the audio converter clock signal, wherein the frequency of the audio converter clock signal is a non-integer multiple of the audio sample rate, and the audio converter clock signal has a frequency equal to 54 MHz multiplied by N/M, where N and M are integers and M is less than or equal to 32.
10. A method of operating an audio converter, comprising:
deriving an audio converter clock signal;
processing encoded audio data to generate an audio data stream sampled at an audio sample rate; and
converting the audio data stream into audio output using the audio converter clock signal, wherein the frequency of the audio converter clock signal is a non-integer multiple of the audio sample rate, and the audio converter clock signal has a frequency equal to 108 MHz multiplied by N/M, where N and M are integers and M is less than or equal to 64.