IP Library Granted Patent US 7,923,297
Granted Patent B2
US 7,923,297 · App. 12/547,907 · Granted Apr 12, 2011

Manufacturing method of semiconductor device

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Quick Facts
Patent No.
US 7,923,297
App. No.
12/547,907
Granted
Apr 12, 2011
Kind
B2
Abstract

Size of a chipping is made small, suppressing blinding of a blade, when performing dicing of a wafer. When cutting a wafer, cutting is performed so that the portion of a V character-shaped shoulder may enter below the front surface of a wafer (depth Z 2 from a substrate front surface) using the metal-bond blade which includes the abrasive particle whose fineness number is more than #3000, and whose point is V character form. By processing it in this way, cutting resistance goes up and blinding of a blade can be prevented. Hereby, the size of a chipping can be suppressed small, preventing blinding of a blade.

Claims (16)

1. A method of manufacturing a semiconductor device, said method comprising the steps of:

a) preparing a wiring board having a top surface and a bottom surface opposite to said top surface, said wiring board having a plurality of mounting areas on said top surface for boarding a plurality of semiconductor chips;

b) mounting a plurality of semiconductor chips on said plurality of mounting areas on said top surface of said wiring board;

c) connecting said plurality of semiconductor chips and said wiring board by a plurality of connecting wires;

d) sealing said plurality of semiconductor chips and said plurality of wires in block by resin;

e) forming a plurality of soldering balls on said bottom surface of said wiring board;

f) forming a plurality of semiconductor packages by individually separating said wiring board with said resin;

wherein, each of said plurality of semiconductor chips having:

a silicon substrate;

a plurality of transistors formed on the surface of said silicon substrate;

a first insulating film of silicone oxide formed on said plurality of transistors;

a multi layer wiring structure formed on said first insulating film;

a second insulating film formed between wiring layers of said multi layer wiring structure, said second insulating film having a lower dielectric constant than said silicon oxide;

and wherein, each of said semiconductor chips having an inclined surface on each of side surfaces thereof, said inclined surface being formed by cutting an upper surface of a semiconductor wafer by a blade having a processed V-shape at the tip thereof.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein said second insulating film is a SiOC film.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein said second insulating film is comprised of a material selected from a group of SiOF film, SiLK film, SiCN film, SiO 2 film containing a methyl group and Methyl Silses Quioxane film.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Sep 13, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024973/0598 →