IP Library Granted Patent US 8,338,876
Granted Patent B2
US 8,338,876 · App. 12/555,320 · Granted Dec 25, 2012

Non-volatile semiconductor storage device and method of manufacturing the same

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,338,876
App. No.
12/555,320
Granted
Dec 25, 2012
Kind
B2
Abstract

A non-volatile semiconductor storage device includes a plurality of memory strings each having a plurality of electrically rewritable memory cells connected in series. Each of the memory strings comprising: a first semiconductor layer including a columnar portion extending in a vertical direction with respect to a substrate; a plurality of first conductive layers formed to surround side surfaces of the columnar portions via insulation layers, and formed at a certain pitch in the vertical direction, the first conductive layers functioning as floating gates of the memory cells; and a plurality of second conductive layers formed to surround the first conductive layers via insulation layers, and functioning as control electrodes of the memory cells. Each of the first conductive layers has a length in the vertical direction that is shorter than a length in the vertical direction of each of the second conductive layers.

Claims (28)

1. A non-volatile semiconductor storage device comprising:

a plurality of memory strings each having a plurality of electrically rewritable memory cells connected in series,

each of the memory strings comprising:

a first semiconductor layer including a columnar portion extending in a vertical direction with respect to a substrate;

a plurality of first conductive layers formed to surround side surfaces of the columnar portions via insulation layers, and formed at a certain pitch in the vertical direction, the first conductive layers functioning as floating gates of the memory cells, and including an insulation film between the plurality of first conductive layers; and

a plurality of second conductive layers formed to surround the first conductive layers via insulation layers, and functioning as control electrodes of the memory cells,

each of the first conductive layers having a length in a longitudinal direction of the first semiconductor layer, that is shorter than a length of each of the second conductive layers in the longitudinal direction of the first semiconductor layer, and the shorter length portion of the first conductor layer being surrounded by the greater length portion of the second conductor layer.

2. The non-volatile semiconductor storage device according to claim 1 , wherein

the first conductive layers are formed of polysilicon.

3. The non-volatile semiconductor storage device according to claim 1 , wherein

the second conductive layers are formed in a stripe pattern at a certain pitch in a first direction parallel to the substrate,

each of the memory strings further comprises a first protection layer formed on a side surface of each of the second conductive layers, and

the first protection layer has a higher selection ratio associated with diluted hydrofluoric acid treatment than that of the second conductive layer.

4. The non-volatile semiconductor storage device according to claim 3 , wherein

the first protection layer is formed of silicon nitride.

5. The non-volatile semiconductor storage device according to claim 1 , further comprising a selection transistor connected to one end of each of the memory strings,

wherein the selection transistor comprises:

a second semiconductor layer extending upward from a top surface of the first semiconductor layer;

a third conductive layer formed to surround a side surface of the second semiconductor layer via an insulation layer, and formed in a stripe pattern at a certain pitch in a first direction parallel to the substrate, the third conductive layer functioning as a control electrode of the selection transistor; and

a second protection layer formed on a side surface of the third conductive layer, and

the second protection layer has a higher selection ratio associated with diluted hydrofluoric acid treatment than that of the third conductive layer.

6. The non-volatile semiconductor storage device according to claim 5 , wherein

the second protection layer is formed of silicon nitride.

7. The non-volatile semiconductor storage device according to claim 1 , wherein

the first semiconductor layer further comprises a joining portion joining lower ends of a pair of the columnar portions, and

each of the memory strings further comprises a fourth conductive layer formed to surround the joining portion via an insulation layer.

8. The non-volatile semiconductor storage device according to claim 1 , wherein

the first semiconductor layer is formed with a hollow therein.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2009
From: KITO, MASARU; FUKUZUMI, YOSHIAKI; KIDOH, MASARU; ISHIDUKI, MEGUMI; KOMORI, YOSUKE; TANAKA, HIROYASU; KATSUMATA, RYOTA; AOCHI, HIDEAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 023461/0366 →
Priority Claims (1)
JP 2008-320590 · Dec 17, 2008 · national
Continuity (1)
Related Publication 20100148237A1 · Jun 17, 2010