Data writing method for magnetoresistive effect element and magnetic memory

1. A magnetic memory comprising:

a plurality of memory cells each including a magnetoresistive effect element which comprises a first magnetic layer having an invariable magnetizing direction, a second magnetic layer having a variable magnetizing direction, and a tunnel barrier layer provided between the first magnetic layer and the second magnetic layer; and

a write circuit which includes a write current generation circuit that generates a write current to change the magnetizing direction of the second magnetic layer, which includes a control circuit which controls an operation of the write current generation circuit, the control circuit comprising an inverter comprising a p-channel field-effect transistor and an n-channel field-effect transistor, the p-channel field-effect transistor having a driving force smaller than a driving force of the n-channel field-effect transistor, and which flows the write current through the magnetoresistive effect element bidirectionally,

wherein the write circuit flows the write current in which a falling period from the start of a falling edge to the end of the falling edge is longer than a rising period from the start of a rising edge to the end of the rising edge,

wherein the rising period of the write current is controlled based on a response speed associated with the driving force of the n-channel field-effect transistor, and

the falling period of the write current is controlled based on a response speed associated with the driving force of the p-channel field-effect transistor.

2. The memory according to claim 1 , wherein the write circuit outputs a predetermined current value as current value of the write current,

the predetermined current value is constant during a period from the end of the rising edge to the start of the falling edge, and is equal to or above values of threshold reversing currents of the plurality of memory cells.

3. The memory according to claim 2 , wherein the write current generation circuit has a constant current source which outputs a current having the predetermined current value.

4. The memory according to claim 2 , further comprising:

a read circuit which generates a read current to read data from a magnetoresistive effect element,

wherein the read current has a rising period and falling period which are equal to each other, and has a current value smaller than the values of threshold reversing currents of the plurality of memory cells.

5. The memory according to claim 1 , wherein the write circuit outputs a first current value and a second current value smaller than the first current value as current values of the write current,

the first current value is constant during a period from the end of the rising edge to the start of the falling edge, and

the second current value is constant during a part of the falling period.

6. The memory according to claim 5 , wherein the write current generation circuit comprises:

a first constant current source which outputs a first current; and

a second constant current source which outputs a second current,

wherein the first current value is generated based on a sum of the first current and the second current, and the second current value is generated based on the first current.

7. The memory according to claim 5 , wherein the first current value is equal to or above the values of the threshold reversing currents of the plurality of memory cells.

8. The memory according to claim 5 , further comprising:

a read circuit which generates a read current to read data from a magnetoresistive effect element,

wherein the read current has a rising period and a falling period which are equal to each other, and has a current value smaller than the second current value.

9. The memory according to claim 1 , wherein a ratio of the falling period and the rising period is 2.5 or above.

10. The memory according to claim 1 , wherein the magnetoresistive effect element has a magnetic tunnel junction.