IP Library Granted Patent US 8,367,520
Granted Patent B2
US 8,367,520 · App. 12/563,327 · Granted Feb 5, 2013

Methods and structures for altering strain in III-nitride materials

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Quick Facts
Patent No.
US 8,367,520
App. No.
12/563,327
Granted
Feb 5, 2013
Kind
B2
Abstract

Methods and structures for producing semiconductor materials, substrates and devices with improved characteristics are disclosed. Structures and methods for forming reduced strain structures include forming an interface between a support structure surface and a strained semiconductor layer. The support structure is selectively etched to form a plurality of semiconductor islands with reduced levels of strain.

Claims (31)

1. A method for forming a semiconductor structure, comprising:

forming a strained semiconductor layer on a base substrate;

forming a bonding interface between a bonding surface of the strained semiconductor layer and a bonding surface of a support structure;

removing the base substrate; and

selectively etching the semiconductor layer and the bonding surface of the support structure thereby exposing adjoining areas of the bonding surface of the semiconductor layer, whereby exposing adjoining areas of the bonding surface of the semiconductor layer produces a plurality of semiconductor islands with reduced levels of strain.

2. The method of claim 1 , wherein removing selected areas of the bonding surface of the support structure further comprises:

masking areas of a free face of the semiconductor layer;

anisotropically etching unmasked areas of the semiconductor layer; and

isotropically etching the support structure.

3. The method of claim 1 , further comprising the formation of device structures on the plurality of semiconductor islands with reduced levels of strain.

4. The method of claim 1 , further comprising forming a substantially continuous layer of semiconductor material from the plurality of semiconductor islands with reduced levels of strain,

whereby the substantially continuous layer of semiconductor material inherits the reduced levels of strain from the plurality of semiconductor islands.

5. The method of claim 4 , wherein forming a substantially continuous layer of material further comprises:

performing lateral growth from the free surface of the plurality of semiconductor islands with reduced levels of strain.

6. The method of claim 1 , further comprising depositing, reflowing and planarizing a layer of reflowable glassy material.

7. The method of claim 1 , wherein the semiconductor layer comprises a III-nitride semiconductor.

8. The method of claim 4 , wherein the substantially continuous layer of semiconductor material is substantially free of phase separation.

9. A method for reducing strain in III-nitride structures comprising:

forming a strained III-nitride layer on a base substrate;

bonding the strained III-nitride layer to a support structure;

removing the base substrate;

selectively etching the strained III-nitride layer to expose the support structure;

selectively laterally etching the support structure; and

forming a continuous III-nitride layer with reduced levels of strain by performing lateral growth from unetched portions of the III-nitride layer.

10. The method of claim 9 , further comprising, depositing, reflowing and planarizing a layer of reflowable glassy material.

11. The method of claim 9 , wherein selectively etching the strained III-nitride layer is performed utilizing anisotropic plasma etching.

12. The method of claim 9 , wherein selectively laterally etching the support structure is performed utilizing wet chemical etching.

13. The method of claim 9 , wherein the support structure includes an etch stop layer comprising a dielectric material capable of substantially preventing nucleation of III-nitride material.

14. The method of claim 9 , further comprising a deposition of a device structure on the continuous III-nitride layer.

15. The method of claim 9 , wherein a portion of the continuous III-nitride layer of material is detached utilizing ion implantation.

16. The method of claim 9 , wherein a portion of the continuous III-nitride layer of material is detached utilizing a plurality of voided regions.

Assignments (1)
CHANGE OF NAME Recorded Feb 28, 2012
From: S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES; CHEMIN DES FRANQUES; PARC TECHNOLOGIES DES FONTAINES; BERNIN. FRANCE 38190
To: SOITEC
Reel/Frame 028138/0895 →