Dynamic scalable concurrent communication and multi-core receiver architecture
An integrated multi-core RF device includes a common amplifier which outputs an amplified RF signal. A common transmission line is configured to supply the amplified RF signal to a plurality of common transmission line distribution connections. Each receiver core of a plurality of receiver cores has a receiver core RF input coupled to one of the plurality of common transmission line distribution connections. Each core is configured to be tunable to a channel and to output at least one baseband output per channel. The integrated multi-core RF device is configured to concurrently down convert a plurality of channels to corresponding down converted baseband signals. The integrated multi-core RF device is configured to allow dynamic selection of the one or more of the plurality of channels over time. A method to recover a DSCC receiver IC is also described.
1. An integrated multi-core RF device comprising:
a substrate having a surface;
a common amplifier disposed on said substrate, said common amplifier electrically coupled to a RF input terminal and outputting an amplified RF signal;
a common transmission line electrically coupled to said common amplifier and configured to supply said amplified RF signal to a plurality of common transmission line distribution connections; and
a plurality of receiver cores disposed on said substrate, each receiver core of said plurality of receiver cores having a receiver core RF input electrically coupled to one of said plurality of common transmission line distribution connections, each core configured to be tunable to a channel and to output at least one baseband output per channel;
said integrated multi-core RF device configured to be controlled to provide a maximum physical distance between receiver cores that are active in real time and that have adjacent LO frequencies, and configured to concurrently receive one or more of a plurality of channels using a set of active receiver cores that is configured to concurrently down convert said each one of said plurality of channels to a corresponding down converted baseband signal, said integrated multi-core RF device configured to allow dynamic selection of said one or more of said plurality of channels over time.
2. The integrated multi-core RF device of claim 1 , wherein said common amplifier comprises a weighted distributed low noise amplifier.
3. The integrated multi-core RF device of claim 1 , wherein said common transmission line comprises a balanced transmission line.
4. The integrated multi-core RF device of claim 3 , wherein said integrated multi-core RF device further comprises a RF balun electrically disposed between said common amplifier and said balanced transmission line.
5. The integrated multi-core RF device of claim 1 , wherein each of said receiver cores comprises an I baseband output and a Q baseband output.
6. The integrated multi-core RF device of claim 1 , wherein each of said receiver cores comprises a RF input amplifier (IA) having a RF IA output, a first mixer, a second mixer, an I&Q generator configured to provide a LO-I signal electrically coupled to a first input of said first mixer and a LO-Q signal electrically coupled to a first input of said second mixer, a second input terminal of said first mixer and said second mixer both electrically coupled to said RF IA output, said first mixer configured to provide an I baseband output and electrically coupled to an I baseband output terminal and said second mixer configured to provide a Q baseband output and electrically coupled to a Q baseband output terminal.
7. The integrated multi-core RF device of claim 6 , wherein said LO-I and said LO-Q signals of each of said receiver cores are configured to have a LO frequency of f×n, where f is a fundamental frequency and where n is an odd integer in the range of 7 to 19 and at least each adjacent receiver core disposed on said substrate has a different said LO-I and said LO-Q signal frequency.
8. The integrated multi-core RF device of claim 7 , wherein said LO frequency is given by the equation: LO freq =528*n MHz, where n is an odd integer in the range of 7 to 19.
9. The integrated multi-core RF device of claim 6 , wherein each of said receiver cores further comprises a phase locked loop (PLL) electrically coupled to an input of said I&Q generator, said PLL electrically coupled to a frequency reference.
10. The integrated multi-core RF device of claim 9 , wherein each PLL of each of said receiver core includes a voltage-controlled oscillator (VCO) having a tuning range and wherein two or more receiver cores are configured to have overlapping tuning ranges.
11. The integrated multi-core RF device of claim 1 , wherein a selected number of said plurality of receiver cores are configured to be made active according to a selected one of availability of said receiver core and data rate demand.
12. The integrated multi-core RF device of claim 1 , further comprising a guard ring substantially surrounding at least one of said receiver cores.
13. A DSCC RF receiver comprising:
an antenna;
a DSCC IC according to claim 1 , said RF input terminal electrically coupled to said antenna and configured to receive an electromagnetic signal;
a demodulator to demodulate said baseband output and to provide a corresponding demodulated output signal at a receiver output terminal;
an electronic circuit configured to control said DSCC IC; and
a power source configured to power said DSCC IC, said demodulator, and said electronic circuit.
14. The DSCC receiver of claim 13 , wherein said electronic circuit comprises a microprocessor.