Semiconductor device with oxygen-diffusion barrier layer and method for fabricating same
View Patent ↗Methods are provided for fabricating a transistor. An exemplary method involves depositing an oxide layer overlying a layer of semiconductor material, forming an oxygen-diffusion barrier layer overlying the oxide layer, forming a layer of high-k dielectric material overlying the oxygen-diffusion barrier layer, forming a layer of conductive material overlying the layer of high-k dielectric material, selectively removing portions of the layer of conductive material, the layer of high-k dielectric material, the oxygen-diffusion barrier layer, and the oxide layer to form a gate stack, and forming source and drain regions about the gate stack. When the conductive material is an oxygen-gettering conductive material, the oxygen-diffusion barrier layer prevents diffusion of oxygen from the deposited oxide layer to the oxygen-gettering conductive material.
1. A method for fabricating a transistor, the method comprising:
depositing an oxide layer overlying a region of semiconductor material;
forming an oxygen-diffusion barrier layer overlying the oxide layer;
forming a layer of high-k dielectric material overlying the oxygen-diffusion barrier layer;
forming a layer of conductive material overlying the layer of high-k dielectric material;
selectively removing portions of the layer of conductive material, the layer of high-k dielectric material, the oxygen-diffusion barrier layer, and the oxide layer to form a gate stack, wherein sidewalls of the layer of conductive material, sidewalls of the layer of high-k dielectric material, and sidewalls of the oxygen-diffusion barrier layer of the gate stack are vertically aligned; and
forming source and drain regions about the gate stack.
2. The method of claim 1 , wherein depositing the oxide layer comprises depositing an oxide material at a temperature between 700° C. and 1000° C.
3. The method of claim 2 , wherein depositing the oxide material comprises depositing the oxide material with a thickness of at least 1 nm.
4. The method of claim 2 , wherein:
the region of semiconductor material comprises a mobility-enhancing material region; and
the oxide material is deposited on the mobility-enhancing material region.
5. The method of claim 2 , wherein forming the oxygen-diffusion barrier layer comprises forming a layer of a material selected from the group consisting of silicon nitride, aluminum nitride, and germanium nitride.
6. The method of claim 5 , wherein forming the layer of conductive material comprises forming a metal layer.
7. The method of claim 6 , further comprising forming a capping layer overlying the layer of high-k dielectric material, wherein selectively removing the portions of the layer of conductive material, the layer of high-k dielectric material, the oxygen-diffusion barrier layer, and the oxide layer also removes a portion of the capping layer to form the gate stack.
8. The method of claim 1 , wherein depositing the oxide layer comprises depositing an oxide material by a deposition process selected from a group consisting of chemical vapor deposition, plasma-enhanced chemical vapor deposition, and atomic layer deposition.
9. The method of claim 1 , wherein:
the region of semiconductor material includes silicon germanium; and
depositing the oxide layer comprises depositing an oxide material on the silicon germanium.
10. The method of claim 1 , wherein forming the oxygen-diffusion barrier layer comprises depositing an oxygen-diffusion barrier material overlying the oxide layer to a thickness between 0.1 nm and 1.5 nm.
11. The method of claim 1 , wherein forming the layer of conductive material overlying the layer of high-k dielectric material comprises forming a metal nitride material overlying the layer of high-k dielectric material.
12. The method of claim 11 , further comprising:
forming a layer of polycrystalline silicon overlying the metal nitride material; and
selectively removing portions of the layer of polycrystalline silicon while selectively removing the portions of the layer of conductive material, the layer of high-k dielectric material, the oxygen-diffusion barrier layer, and the oxide layer to form the gate stack.
13. The method of claim 11 , further comprising forming a layer of capping material overlying the high-k dielectric material prior to forming the metal nitride material, wherein:
the capping material comprises a rare earth oxide or a metal oxide; and
the metal nitride material overlies the capping material.
14. A method for fabricating a semiconductor device including a first transistor and a second transistor, the method comprising:
providing a semiconductor device structure having a first region of a first semiconductor material and a second region of a second semiconductor material;
depositing a first oxide layer overlying the first region and the second region, the first oxide layer having a first thickness;
forming an oxygen-diffusion barrier layer overlying the first oxide layer;
removing the oxygen-diffusion barrier layer and the first oxide layer overlying the second region, while leaving intact the oxygen-diffusion barrier layer and the first oxide layer overlying the first region;
forming a dielectric layer overlying the second region, the dielectric layer having a second thickness, the second thickness being less than the first thickness;
forming a layer of high-k dielectric material overlying the oxygen-diffusion barrier layer of the first region and the dielectric layer of the second region;
forming a layer of conductive material overlying the layer of high-k dielectric material;
selectively removing portions of the layer of conductive material, the layer of high-k dielectric material, the oxygen-diffusion barrier layer, and the first oxide layer overlying the first region to form a first gate stack for the first transistor, wherein sidewalls of the layer of conductive material, sidewalls of the layer of high-k dielectric material, and sidewalls of the oxygen-diffusion barrier layer of the first gate stack are vertically aligned; and
selectively removing portions of the layer of conductive material, the layer of high-k dielectric material, and the dielectric layer overlying the second region to form a second gate stack for the second transistor.
15. The method of claim 14 , wherein the first transistor comprises an I/O transistor and the second transistor comprises a logic transistor.
16. The method of claim 14 , wherein forming the dielectric layer comprises growing a second oxide layer, the second oxide layer.
17. The method of claim 16 , wherein growing the second oxide layer comprises performing a chemical clean of the semiconductor device structure using an oxidizing substance.
18. The method of claim 14 , wherein:
the first region includes a mobility-enhancing material; and
the first oxide layer is deposited on the mobility-enhancing material.
19. The method of claim 14 , wherein forming the dielectric layer overlying the second region comprises forming a nitrided oxide overlying the second region.