IP Library Granted Patent US 7,888,243
Granted Patent B2
US 7,888,243 · App. 12/569,671 · Granted Feb 15, 2011

Semiconductor device and method of manufacturing the semiconductor device

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Quick Facts
Patent No.
US 7,888,243
App. No.
12/569,671
Granted
Feb 15, 2011
Kind
B2
Abstract

An active region in a semiconductor device is made up of a parallel p-n layer including a first p-semiconductor layer and a first n-semiconductor with the widths and total amounts of impurities being equal to each other to provide a structure in which charges are balanced. A section parallel to stripes in the parallel p-n layer in an inactive region is made up of a second parallel p-n layer including a second p-semiconductor layer, with its width larger than that of the first p-semiconductor layer, and a second n-semiconductor layer with its width smaller than that of the first n-semiconductor layer. The total amount of impurities in the second p-semiconductor layer is made larger than that in the second n-semiconductor layer to provide a structure in which charges are made unbalanced.

Claims (7)

1. A method of manufacturing a semiconductor device in which a parallel p-n layer with first conductivity type semiconductor layers and second conductivity type semiconductor layers being alternately joined is provided on a first conductivity type low resistance semiconductor layer and a part of the parallel p-n layer is provided over an active region in which a current flows in a turned-on state and a part of the parallel p-n layer is provided over an inactive region around the active region, the method comprising:

carrying out epitaxial growth of a first conductivity type semiconductor layer on the first conductivity type low resistance semiconductor layer;

depositing an insulator film on the surface of the epitaxially grown first conductivity type semiconductor layer;

carrying out patterning of the insulator film to form a mask for forming trenches;

by using the patterned insulator film as a mask, forming a plurality of trenches in a region to become an active region in the first conductivity type semiconductor layer and along with this, forming a plurality of trenches in a part of a region to become an inactive region in the first conductivity type semiconductor layer, the trenches being formed with a spacing different from that of the trenches formed in the region to become the active region;

carrying out epitaxial growth of a second conductivity type semiconductor layer in each of the trenches formed in the first conductivity type semiconductor layer to fill trenches with the second conductivity type semiconductor layers to a level equal to or higher than the level of the surface of the insulator film used as the mask for forming the trenches; and

polishing the parallel p-n layer comprising the first conductivity type semiconductor layers and the second conductivity type semiconductor layers filling the trenches to planarize the surface of the parallel p-n layer.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Aug 26, 2011
From: FUJI ELECTRIC SYSTEMS CO., LTD. (FES); FUJI TECHNOSURVEY CO., LTD. (MERGER BY ABSORPTION)
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 026970/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2010
From: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
To: FUJI ELECTRIC SYSTEMS CO., LTD.
Reel/Frame 024252/0451 →