Semiconductor device and method of fabricating semiconductor device
View Patent ↗A semiconductor device may be fabricated according to a method that reduces stain difference of a passivation layer in the semiconductor device. The method may include forming top wiring patterns in a substrate, depositing a primary undoped silicate glass (USG) layer on the top wiring patterns to fill a gap between the top wiring patterns, and coating a SOG layer on the substrate on which the primary USG layer has been deposited. Next, the SOG layer on the surface of the substrate may be removed until the primary USG layer is exposed, and a secondary USG layer may be deposited on the substrate on which the primary USG layer has been exposed.
1. A semiconductor device comprising:
top wiring patterns formed in a substrate;
a primary USG layer formed on the top wiring patterns to fill a gap between the top wiring patterns;
an SOG layer formed on the substrate on which the primary USG layer is deposited, wherein the SOG layer further fills the gap between the top wiring patterns and exposes the primary USG layer; and
a secondary USG layer formed on the substrate on which the primary USG layer is exposed.
2. The semiconductor device of claim 1 , further comprising a silicon nitride layer formed on the secondary USG layer.
3. The semiconductor device of claim 1 , wherein the primary USG layer is not exposed by the SOG layer at a region corresponding to the gap between the top wiring patterns.