Method of manufacturing flash memory device
View Patent ↗A method of manufacturing a flash memory device according to an embodiment includes forming a second oxide layer pattern having a mask pattern buried therein on a first nitride layer pattern and a first oxide layer stack on a semiconductor substrate; forming first polysilicon patterns at sidewalls of the buried mask pattern; removing portions of the first oxide layer, the first nitride layer pattern, and the second oxide layer pattern to form a third oxide layer pattern, a second nitride layer pattern, and a fourth oxide layer pattern at lower portions of the first polysilicon patterns and the mask pattern; forming a fifth oxide layer pattern surrounding each of the first polysilicon patterns; forming second polysilicon patterns on sidewalls of the fifth oxide layer pattern; and removing the mask pattern and parts of the third oxide layer pattern and the second nitride layer pattern between the first polysilicon patterns.
1. A method of manufacturing a flash memory device, the method comprising:
forming a first oxide layer on a semiconductor substrate, forming a first nitride layer pattern on the first oxide layer, and forming a second oxide layer pattern having a mask pattern buried therein on the first nitride layer pattern;
forming a first polysilicon pattern on a sidewall of the mask pattern that is surrounded by the second oxide layer pattern;
performing a first etching process with respect to the semiconductor substrate having the first polysilicon pattern, the first oxide layer, the first nitride layer pattern, and the second oxide layer pattern such that a third oxide layer pattern, a second nitride layer pattern and a fourth oxide layer pattern are formed at lower portions of the first polysilicon pattern and the mask pattern;
forming a fifth oxide layer pattern surrounding the first polysilicon pattern and forming a second polysilicon pattern on a sidewall of the fifth oxide layer pattern in a form of a spacer; and
removing the mask pattern and parts of the third oxide layer pattern and the second nitride layer pattern at the lower portion of the mask pattern.
2. The method of manufacturing a flash memory device according to claim 1 , wherein forming a second oxide layer pattern having a mask pattern buried therein on the first nitride layer pattern comprises:
forming an initial oxide layer on the nitride layer pattern;
forming the mask pattern on the initial oxide layer;
etching the initial oxide layer using the mask pattern as an etch mask; and
forming a secondary oxide layer on the substrate including on the mask pattern, thereby burying the mask pattern within the second oxide layer pattern formed of the initial oxide layer and the secondary oxide layer.
3. The method of manufacturing a flash memory device according to claim 1 , wherein forming the first polysilicon pattern on the sidewall of the mask pattern that is surrounded by the second oxide layer pattern comprises:
forming a first polysilicon layer on the second oxide layer pattern having the mask pattern buried therein; and
performing a second etching process with respect to the semiconductor substrate including the first polysilicon layer such that a first polysilicon pattern is formed on the sidewall of the mask pattern that is surrounded by the second oxide layer pattern,
wherein the second etching process includes an anisotropic etching process.
4. The method of manufacturing a flash memory device according to claim 1 , wherein the fifth oxide layer pattern is formed by performing a first heat treatment process with respect to the semiconductor substrate.
5. The method of manufacturing a flash memory device according to claim 1 , wherein forming the second polysilicon pattern on the sidewall of the fifth oxide layer pattern comprises:
forming a second polysilicon layer on the semiconductor substrate including the fifth oxide layer pattern surrounding the first polysilicon pattern; and
performing a third etching process on the second polysilicon layer,
wherein the third etching process includes an anisotropic etching process.
6. The method of manufacturing a flash memory device according to claim 1 , wherein a plurality of first polysilicon patterns each having same sizes is formed on the sidewalls of the mask pattern.
7. The method of manufacturing a flash memory device according to claim 1 , wherein a plurality of second polysilicon patterns each having same sizes is formed on the sidewalls of the fifth oxide layer pattern.
8. The method of manufacturing a flash memory device according to claim 1 , further comprising: adjusting a size of the first polysilicon pattern by selecting a size of the mask pattern.
9. The method of manufacturing a flash memory device according to claim 1 , wherein the first etching process exposes the semiconductor substrate.
10. The method of manufacturing a flash memory device according to claim 1 , wherein the fifth oxide layer pattern is partially removed when removing the parts of the third oxide layer pattern and the second nitride layer pattern.
11. The method of manufacturing a flash memory device according to claim 1 , wherein the fifth oxide layer pattern is aligned between the first polysilicon pattern and the second polysilicon pattern and between the mask pattern and the first polysilicon pattern.