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App. No. 12/585,441 · Confirmation No. 7704

Layout verification apparatus, layout apparatus, layout verification method, layout verification program, and wiring forming method

Inventor: Takeshi Hamamoto
Abandoned -- Failure to Respond to an Office Action View Publication ↗
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 Code Description Pages PDF
2012-09-19 ABN Abandonment 2 View
2012-02-28 CTRS Requirement for Restriction/Election 7 View
2012-02-28 FWCLM Index of Claims 1 View
2010-05-13 NTC.PUB Notice of Publication 1 View
2009-10-22 PD.FILED.E Priority Documents electronically retrieved by USPTO from a participating IP Office 23 View
2009-10-02 APP.FILE.REC Filing Receipt 3 View
2009-09-15 TRNA Transmittal of New Application 8 View
2009-09-15 SPEC Specification 22 View
2009-09-15 CLM Claims 6 View
2009-09-15 ABST Abstract 1 View
2009-09-15 DRW Drawings-only black and white line drawings 9 View
2009-09-15 OATH Oath or Declaration filed 2 View
2009-09-15 TRAN.LET Transmittal Letter 1 View
2009-09-15 136A Authorization for Extension of Time all replies 8 View
2009-09-15 IDS Information Disclosure Statement (IDS) Form (SB08) 1 View
2009-09-15 FOR Foreign Reference 19 View
2009-09-15 WFEE Fee Worksheet (SB06) 1 View
2009-09-15 WFEE Fee Worksheet (SB06) 1 View
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Quick Facts
App. No.
12/585,441
Filed
2009-09-15
Pub. No.
US20100115765A1
Art Unit
3729