Method of manufacturing a semiconductor device
View Patent ↗This disclosure concerns a manufacturing method of a semiconductor device includes forming a Fin-type body on an insulation layer, the Fin-type body being made of a semiconductor material and having an upper surface covered with a protective film; forming a gate insulation film on side surfaces of the Fin-type body; depositing a gate electrode material so as to cover the Fin-type body; planarizing the gate electrode material; forming a gate electrode by processing the gate electrode material; depositing an interlayer insulation film so as to cover the gate electrode; exposing the upper surface of the gate electrode; depositing a metal layer on the upper surface of the gate electrode; siliciding the gate electrode by reacting the gate electrode with the metal layer; forming a trench on the upper surface of the protective film by removing an unreacted metal in the metal layer; and filling the trench with a conductor.
1. A manufacturing method of a semiconductor device, comprising:
forming a Fin-type body, the Fin-type body being made of a semiconductor material and having an upper surface covered with a protective film;
forming a gate insulation film on side surfaces of the Fin-type body;
depositing a gate electrode material on the gate insulation film;
depositing a covering material different from the gate electrode material so as to cover the Fin-type body and the gate electrode material;
planarizing the covering material;
forming a gate electrode and a cover covering the upper surface of the gate electrode by processing the gate electrode material and the covering material;
forming a gate side wall on side surfaces of the gate electrode and the cover;
depositing an interlayer insulation film so as to cover the gate electrode and the cover;
exposing the upper surface of the cover by planarizing the interlayer insulation film;
forming a trench on the upper surface and side surfaces of the gate electrode by removing the cover;
depositing a metal layer on the upper surface and the side surfaces of the gate electrode;
siliciding the gate electrode by reacting the gate electrode with the metal layer;
removing an unreacted metal in the metal layer; and
filling the trench with a conductor.
2. The manufacturing method of a semiconductor device according to claim 1 , wherein
the metal layer includes any one of nickel, tungsten, platinum, cobalt, molybdenum, titanium, erbium, ytterbium and palladium.
3. The manufacturing method of a semiconductor device according to claim 1 , wherein
the metal layer is deposited on an exposed surface of the gate electrode.
4. The manufacturing method of a semiconductor device according to claim 3 , wherein the conductor is provided on or above the protective film.
5. The manufacturing method of a semiconductor device according to claim 4 , wherein
the depositing a metal layer on the upper surface and the side surfaces of the gate electrode is provided with a portion corresponding to source and drain region that is covered with the insulation film.
6. The manufacturing method of a semiconductor device according to claim 3 , wherein
the depositing a metal layer on the upper surface and the side surfaces of the gate electrode is provided with a portion corresponding to source and drain region that is covered with the insulation film.
7. The manufacturing method of a semiconductor device according to claim 1 , wherein
the conductor is provided on or above the protective film.
8. The manufacturing method of a semiconductor device according to claim 1 , wherein
a first gate electrode provided on a side surface of the Fin-type body via the gate insulation film and a second gate electrode provided on another side surface of the Fin-type body via the gate insulation film are electrically connected with the conductor.
9. The manufacturing method of a semiconductor device according to claim 8 , wherein the conductor is provided on or above the protective film.
10. The manufacturing method of a semiconductor device according to claim 1 , wherein
the depositing a metal layer on the upper surface and the side surfaces of the gate electrode is provided with a portion corresponding to source and drain region that is covered with the insulation film.