Delay adjustment device, semiconductor device and delay adjustment method

1. A delay adjustment device that is connected to a memory, and adjusts a timing to retrieve data with a data signal and a data strobe signal output from the memory, the delay adjustment device comprising:

a data retrieve unit that receives the data signal and the data strobe signal, and outputs a data value of the data signal in accordance with the data strobe signal; and

a control unit that issues a read command to the memory, retrieves values of the data strobe signal in response to the read command to calculate flight time, and controls a valid period of the data strobe signal based on the flight time,

wherein the control unit comprises:

a valid signal output unit that outputs a valid signal to indicate the valid period of the data strobe signal;

a strobe value retrieve unit that retrieves the values of the data strobe signal in accordance with the valid signal; and

an adjustment unit that issues the read command, instructs a timing to output the valid signal to the valid signal output unit, retrieves the values of the data strobe signal from the strobe retrieve unit, and calculates the flight time using the retrieved value,

wherein the adjustment unit instructs the valid signal output unit of the timing to output the valid signal, according to an internal clock signal, and calculates the flight time using a phase difference between the internal clock signal and the data strobe signal,

wherein the adjustment unit uses a requestor clock signal used by requestor as the internal clock signal, and

wherein the data retrieve unit comprises:

a mask unit that enables the data strobe signal in accordance with the valid signal, and outputs the enabled signal;

a data value retrieve unit that retrieves a data value from the data signal with the signal output from the mask unit; and

a delay unit that delays the retrieved data value according to the requestor clock signal.

2. The delay adjustment device according to claim 1 , wherein the adjustment unit causes the valid signal output unit to output the valid signal at different timings after issuing the read command to retrieve the values of the data strobe signal from the strobe value retrieve unit, and compares a given waveform of the data strobe signal with a change in the values of the data strobe signal to calculate the flight time.

3. The delay adjustment device according to claim 1 , wherein:

the control unit includes a normal mode for issuing the read command by the requestor and an adjustment mode for issuing the read command by itself to calculate the flight time,

in the normal mode, the adjustment unit notifies the valid signal output unit of a delay time generated until the valid signal is output after the read command is issued from the requestor, based on the calculated flight time,

the valid signal output unit outputs the valid signal after the delay time from issuance of the read command, and the mask unit enables the data strobe signal with the valid signal.

4. The delay adjustment device according to claim 3 , wherein:

the data strobe signal includes a data transfer period for transferring data by the data signal and a preamble prior to the data transfer period,

in the adjustment mode, the adjustment unit notifies the valid signal output unit of a time necessary for retrieving the data strobe signal, as the delay time, in response of the read command issued by itself, repeats the issuance of the read command and the notification of the delay time to retrieve the value of the data strobe signal at a plurality of timings, and detects a preamble period of the data strobe signal to calculate the flight time.

5. The delay adjustment device according to claim 4 , wherein the adjustment unit causes the data strobe signal to reach a level higher than a high impedance state by pulling up the data strobe signal when issuing the read command.

6. The delay adjustment device according to claim 1 , wherein the memory comprises a DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory).