Semiconductor device including first and second sidewalls and method of manufacturing semiconductor device
View Patent ↗The invention provides a method of manufacturing a semiconductor device including a non-volatile memory with high yield, and a semiconductor device manufactured by the method. A method of manufacturing a semiconductor device includes a process of forming a second side wall such that the width of the second side wall, which is formed on the side of a portion of a second gate electrode that does not face dummy gates on a drain forming region side, in a gate length direction is larger than that of the second side wall, which is formed on the side of the second gate electrode on a source forming region side, in the gate length direction, in a non-volatile memory forming region.
1. A method of manufacturing a semiconductor device, comprising:
forming an FET forming region including a first gate electrode and a non-volatile memory forming region including a second gate electrode and a plurality of dummy gates provided in a comb teeth shape on a drain forming region side of said second gate electrode over a substrate;
forming a resist film that covers said non-volatile memory forming region;
implanting impurities into said substrate of said FET forming region, using said resist film and said first gate electrode as a mask, to form a pair of extension regions on both sides of said first gate electrode in the vicinity of the surface of said substrate;
removing said resist film and forming an insulating film so as to cover said FET forming region and said non-volatile memory forming region; and
etching said insulating film to obtain a first side wall formed over the side of said first gate electrode and a second side wall formed over the sides of said second gate electrode and said dummy gates,
wherein said etching said insulating film contains obtaining said second side wall in which the width of said second side wall formed over the side wall of said second gate electrode not facing said dummy gates on said drain forming region side is larger, compared to the width of said second side wall formed over the side wall of said second gate electrode on a source forming region side, in the gate length direction.
2. The method of manufacturing a semiconductor device as set forth in claim 1 , further comprising:
after said etching said insulating film,
implanting impurities, using said first gate electrode and said first side wall, and said second gate electrode, said dummy gates, and said second side wall as a mask, to form a pair of first source/drain regions on both sides of said first side wall in the vicinity of the surface of said substrate, and a pair of second source/drain regions on both sides of said second side wall and said dummy gates in the vicinity of the surface of said substrate; and
performing annealing to activate the impurities in said first source/drain regions and said second source/drain regions.
3. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein said dummy gates are spaced from each other in a gate width direction with a distance z represented by the following expression therebetween:
5x<z≦2.5x
wherein x indicates the length of said second side wall formed on said source forming region side of said second gate electrode in the gate length direction.
4. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein said plurality of dummy gates are spaced from said second gate electrode on surface in the side of region to be formed a drain.
5. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein said insulating film includes a nitride film.