IP Library Patent Application 12591365
Patent Application
App. No. 12/591,365

Method of manufacturing nonvolatile semiconductor memory device

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Quick Facts
Patent No.
US None
App. No.
12/591,365
Abstract

A method of manufacturing a nonvolatile semiconductor memory device, is achieved by forming a word gate on a gate insulating film which is formed on a wafer substrate; by forming charge accumulation films to cover a surface of the wafer substrate, side surfaces of the word gate and an upper surface of the word gate; by forming a conductive film to cover the charge accumulation film; and by forming control gates by etching the conductive film. The forming the control gates is achieved by setting an etching condition in which a bias power of 100 W to 1500 W is applied to a cathode electrode as a wafer stage on which the wafer substrate is arranged; and by performing anisotropic dry etching.

Claims (17)

1 . A method of manufacturing a nonvolatile semiconductor memory device, comprising:

forming a word gate on a gate insulating film which is formed on a wafer substrate;

forming, charge accumulation films to cover a surface of said wafer substrate, side surfaces of said word gate and an upper surface of said word gate;

forming a conductive film to cover said charge accumulation film; and

forming control gates by etching said conductive film,

wherein said forming said control gates comprises

setting an etching condition in which a bias power of 100 W to 1500 W is applied to a cathode electrode as a wafer stage on which said wafer substrate is arranged; and

performing anisotropic dry etching.

2 . The method according to claim 1 , wherein said forming said control gates comprises:

setting the etching condition in which the bias power of 150 W to 500 W is applied to the cathode electrode on which said wafer substrate is arranged; and

performing the anisotropic dry etching.

3 . The method according to claim 1 , wherein said forming said control gates comprises:

performing the etching until an uppermost part of said control gate becomes lower than an upper surface of said word gate.

4 . The method according to claim 1 , wherein said forming said conductive film comprises:

forming said conductive film to have a target width of said control gate.

5 . The method according to claim 1 , further comprising:

forming a silicide layer on upper surfaces of said word gate and said control gates.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0147 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2010
From: TANIGUCHI, KENSUKE
To: NEC ELECTRONICS CORPORATION
Reel/Frame 023808/0862 →